SNLU269 april 2023 SN75LVPE3410
Register 0xFF[1] is used to perform broadcast register writes to all channels. Users can perform single-channel read-modify-broadcast-write commands by setting register 0xFF to 0x03 and selecting a single channel in the 0xFC register. All reads will be from the channel selected in register 0xFC. If more than one channel is selected in register 0xFC, then reads are invalid.
Table 3-2 shows how to configure the device to read back values from Channel 0 and then broadcast write to all channels. TI highly recommends to select only one channel for read back when simultaneously enabling broadcast writes.
Step | Register Set | Operation | Register Address [HEX] | Register Value [HEX] | Write Mask [HEX] | Comment |
---|---|---|---|---|---|---|
1 | Share | Write | 0xFF | 0x03 | 0xFF | Enable Channel Register Page access and broadcast mode. |
2 | Share | Write | 0xFC | 0x01 | 0xFF | Select only register set channel 0 for read back. |