This User’s Guide discusses how to properly operate and configure the DP83TD510E-EVM. For best layout practices, schematic files, and Bill of Materials, see the associated support documents.
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ACRONYM | DEFINITION |
---|---|
PHY | Physical Layer Transceiver |
MAC | Media Access Controller |
SMI | Serial Management Interface |
MDIO | Management Data I/O |
MDC | Management Data Clock |
RGMII | Reduced Gigabit Media Independent Interface |
SFD | Start-of-Frame Detection |
VDDA | Analog Core Supply Rail |
VDDIO | Digital Supply Rail |
PD | Pulldown |
PU | Pullup |
MC | Microcontroller |
AFE | Analog Front End |
The DP83TD510E-EVM supports 10-Mbps speed and is IEEE 802.3cg compliant. A DP83822I media converter board is provided for 10BASE-TX Standard Ethernet support and enables bit-error rate testing, interoperability testing, and PMA compliance testing. The EVM also provides on-board tools to configure PHY register using a USB-MDIO graphical user interface tool. The EVM can be powered by a Wide-Vin 5V-36V power supply or through a microUSB cable. Both the DP83TD510E and DP83822I can be set to RMII Master or Slave through an on-board 25-MHz crystal oscillator or the other's RMII 50-MHz clock, respectively.