The open-loop gain versus frequency is important because it shows the DC gain, the dominant pole, the unity gain bandwidth and the phase margin. Figure 2-1 shows the circuit to test Open Loop Gain and Phase Margin Test Circuit. At DC, the capacitor is open and the inductor is short creating a feedback loop from output to inverting input of the op amp. At higher frequencies, the capacitor is a short and the inductor is open, this places the op amp in an open loop configuration. The capacitor and inductor values are chosen to be large to provide an early roll off [as seen in the formula below (1)] so that even if the op amp tested has a very low frequency dominant pole, the simulation shows a smooth transition and 20 dB per decade roll off. For more information on performing op amp stability analysis, please refer to the Texas Instruments Precision Labs video series on stability.

When testing open-loop gain and phase, the user should choose an upper frequency limit that goes beyond the unity-gain bandwidth of the amplifier. In the example provided, the unity-gain bandwidth of OPA191 is 2.5 MHz, Figure 2-2 shows the simulated A_OL plot for OPA191 and Figure 2-3 shows the data sheet A_OL plot for OPA191.

When using rail-to-rail output models, it is important to use the test circuit with the same load (R_L and C_L) indicated in the data sheet, otherwise the result might not reflect the actual amplifier’s capabilities. This is especially true about the DC gain (in consideration with formula 2). In the example provided, the OPA191 data sheet specifies an R_L of 10 kΩ and C_L of 100 pF.

For a more complete simulation test analysis, please refer to the following EDN article, authored by Ian Williams. This circuit may be simulated by downloading the AN1516 Test Circuits in either TINA-TI™ or PSpice® for TI.