SNOAA35F April   2019  – December 2024 LM2901 , LM2901B , LM2901B-Q1 , LM2903 , LM2903-Q1 , LM2903B , LM2903B-Q1 , LM339 , LM339-N , LM393 , LM393-N , LM393B , LM397 , TL331 , TL331-Q1 , TL331B

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Devices Covered in Application Note
    1. 1.1 Base Part Numbers
    2. 1.2 Input Voltage Offset Grades
    3. 1.3 Maximum Supply Voltage
    4. 1.4 High Reliability Options
  5. 2 The New TL331B, TL391B, LM339B, LM393B, LM2901B and LM2903B B Versions
  6. 3 PCN's to Change Classic Die to a New Die Design
    1. 3.1 PCN #1 for Single and Dual (TL331 and LMx93/LM2903)
    2. 3.2 PCN #2 for Single and Dual (TL331 and LMx93/LM2903)
    3. 3.3 PCN For Quad (LMx39, LM2901)
    4. 3.4 PCN for B Devices (including -Q1's)
    5. 3.5 Device PCN Summary
    6. 3.6 Determining Die Version Used
      1. 3.6.1 Determine Die Used for Single TL331 and Dual LM293, LM393, and LM2903 - PCN #1 (Ji3)
      2. 3.6.2 Determine Die Used for Single TL331 and Dual LM293, LM393, and LM2903 - PCN #2 (TiB)
      3. 3.6.3 Determine Die Used for Quad LM139, LM239, LM339, and LM2901
      4. 3.6.4 Determine Die Used for Post-PCN B Devices
  7. 4 Changes to Package Top Markings
  8. 5 Roughened Leadframe Finish
  9. 6 Input Considerations
    1. 6.1  Input Stage Schematic – The Classic LM339 Family
    2. 6.2  Input Stage Schematic - New "B" and TiB Devices
    3. 6.3  Differences Between the Classic, "B" and Tib Die Devices
    4. 6.4  Input Voltage Range
    5. 6.5  Input Voltage Range vs. Common Mode Voltage Range
    6. 6.6  Reason for Input Range Headroom Limitation
    7. 6.7  Input Voltage Range Feature
    8. 6.8  Both Inputs Above Input Range Behavior
    9. 6.9  Negative Input Voltages
      1. 6.9.1 Maximum Input Current
      2. 6.9.2 Phase Reversal or Inversion
      3. 6.9.3 Protecting Inputs from Negative Voltages
        1. 6.9.3.1 Simple Resistor and Diode Clamp
        2. 6.9.3.2 Voltage Divider with Clamp
          1. 6.9.3.2.1 Split Voltage Divider with Clamp
    10. 6.10 Power-Up Behavior
    11. 6.11 Capacitors and Hysteresis
    12. 6.12 Output to Input Cross-Talk
  10. 7 Output Stage Considerations
    1. 7.1 Output VOL and IOL
    2. 7.2 Pull-Up Resistor Selection
    3. 7.3 Short Circuit Sinking Current
    4. 7.4 Pulling Output Up Above Vcc
    5. 7.5 Negative Voltages Applied to Output
    6. 7.6 Adding Large Filter Capacitors To Output
  11. 8 Power Supply Considerations
    1. 8.1 Supply Bypassing
      1. 8.1.1 Low VCC Guidance
      2. 8.1.2 Split Supply use
  12. 9 General Comparator Usage
    1. 9.1 Unused Comparator Connections
      1. 9.1.1 Do Not Connect Inputs Directly to Ground
      2. 9.1.2 Unused Comparator Input Connections
      3. 9.1.3 Leave Outputs Floating
      4. 9.1.4 Prototyping
  13. 10PSpice and TINA TI Models
  14. 11Conclusion
  15. 12Related Documentation
    1. 12.1 Related Links
  16. 13Revision History

6.2 Input Stage Schematic - New "B" and TiB Devices

For the new B, Ji3 and TiB devices, to improve propagation delay and output drive capability, an additional gain stage consisting of Q13 and Q14 was added to the classic LM339 design.

Simplified "B" Internal Schematic - Ji3 and quad TiB (First PCN)Figure 6-2 Simplified "B" Internal Schematic - Ji3 and quad TiB (First PCN)

While this additional stage did improve the specifications, the extra stage does add an inversion to the signal path (note that the inputs are now reversed). One effect of this inversion was that Section 6.8 is inverted, causing the B devices output go high. Dedicated ESD protection structures were also added for more robust ESD performance.

Simplified Post-PCN "B" and TiB Internal Schematic with Clamp Figure 6-3 Simplified Post-PCN "B" and TiB Internal Schematic with Clamp

For the new Quad LM139/239/339/2901 and post PCN singles and duals in the new TiB process, a clamp transistor (Q15 in red) was added around Q3 to make sure the output goes low when the input stage is in cut-off.

Normally Q15 does not conduct unless Q2 and Q3 are cut off (when inputs are > Vcc-1V), then Q15 conducts and forces the output low. Eventually, all the future and "B" devices can follow this schematic.