SNOAA62B February   2023  – October 2024 LMP7704-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Overview
  5. 2SEE Mechanisms
  6. 3Test Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5SEL Results
  9. 6SET Results
  10. 7Extended Characterization
    1. 7.1 Correlation Test Results
    2. 7.2 Root Cause
    3. 7.3 SEL Prevention
  11. 8Summary
  12.   A Confidence Interval Calculations
  13.   B References
  14.   C Revision History

SEL Prevention

The ceramic body and metal lid of the LMP7704-SP package present a barrier to high-energy ions. For an energetic particle to trigger the ESD clamp cell and potentially cause an SET, the particle must first pass through or bypass the package. External damage such as high heat or mechanical stress can put stress on the package, possibly resulting in a detached lid if the stress were severe enough. Visual and physical inspection of assembled circuits can identify sites of concern and reduce the risk of undetected damage to the package. Additional shielding throughout the body of the satellite or other structure provides additional protection.

Utilize decoupling capacitors of 10nF to 100nF at the supply pins of the device. Avoid using large bulk decoupling capacitors where possible. If a capacitance of over 220nF is present on the supply bus, is near the device, and is not significantly isolated by series resistance or inductance, consider adding a deliberate isolation resistance. In one experiment using 1206 capacitors placed adjacently, a 2.5Ω isolation resistor did not prevent an SEL, but a 5Ω isolation resistor did.

LMP7704-SP Example of Series Resistance Used to Isolate Bulk Decoupling CapacitorFigure 7-6 Example of Series Resistance Used to Isolate Bulk Decoupling Capacitor

SEL vulnerability increases for supply voltages in excess of 5.2V. Circuits using supply voltages at or below this level were not observed to experience SEL.