SNOS674J
October 1997 – September 2024
LMC6482
,
LMC6484
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information LMC6482
5.5
Thermal Information LMC6484
5.6
Electrical Characteristics: VS = 5V
5.7
Electrical Characteristics: VS = 3V
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Amplifier Topology
6.3.2
Input Common-Mode Voltage Range
6.3.3
Rail-to-Rail Output
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Upgrading Applications
7.1.2
Data Acquisition Systems
7.1.3
Instrumentation Circuits
7.2
Typical Applications
7.2.1
3V Single-Supply Buffer Circuit
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Capacitive Load Compensation
7.2.1.2.2
Capacitive Load Tolerance
7.2.1.2.3
Compensating For Input Capacitance
7.2.1.2.4
Offset Voltage Adjustment
7.2.1.3
Application Curves
7.2.2
Typical Single-Supply Applications
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Spice Macromodel
8.1.1.2
PSpice® for TI
8.1.1.3
TINA-TI™ Simulation Software (Free Download)
8.1.1.4
DIP-Adapter-EVM
8.1.1.5
DIYAMP-EVM
8.1.1.6
TI Reference Designs
8.1.1.7
Analog Filter Designer
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Data Sheet
LMC648x CMOS Rail-to-Rail Input and Output Operational Amplifiers