SNOSB14E August   2009  – July 2024 LPV521

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Stage
      2. 6.4.2 Output Stage
  8. 7 Applications and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Capacitive Load
      2. 7.1.2 EMI Suppression
    2. 7.2 Typical Applications
      1. 7.2.1 60Hz Twin T-Notch Filter
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Portable Gas Detection Sensor
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curve
      3. 7.2.3 High-Side Battery Current Sensing
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) LPV521 UNIT
DCK (SC70) P (PDIP)
5 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance(2) 456 102.3 °C/W
RθJC(top) Junction-to-case(top) thermal resistance 53.9 81.2 °C/W
RθJB Junction-to-board thermal resistance 48.9 64.9 °C/W
ψJT Junction-to-top characterization parameter 6.6 47.6 °C/W
ψJB Junction-to-board characterization parameter 48.3 64.1 °C/W
RθJC(bot) Junction-to-case(bottom) thermal resistance N/A N/A °C/W
(1) For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA) / θJA. All numbers apply for packages soldered directly onto a PCB.