SNOSD01D May   2015  – October  2016 LDC1101

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Digital Interface
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Sensor Driver
    4. 8.4 Device Functional Modes
      1. 8.4.1 Measurement Modes
      2. 8.4.2 RP+L Measurement Mode
        1. 8.4.2.1 RPMIN and RPMAX
        2. 8.4.2.2 Programmable Internal Time Constants
        3. 8.4.2.3 RP+L Mode Measurement Sample Rate
      3. 8.4.3 High Resolution L (LHR) Measurement Mode
      4. 8.4.4 Reference Count Setting
      5. 8.4.5 L-Only Measurement Operation
      6. 8.4.6 Minimum Sensor Frequency and Watchdog Setting
      7. 8.4.7 Low Power Modes
        1. 8.4.7.1 Shutdown Mode
        2. 8.4.7.2 Sleep Mode
      8. 8.4.8 Status Reporting
      9. 8.4.9 Switch Functionality and INTB Reporting
    5. 8.5 Programming
      1. 8.5.1 SPI Programming
    6. 8.6 Register Maps
      1. 8.6.1  Individual Register Listings
      2. 8.6.2  Register RP_SET (address = 0x01) [reset = 0x07]
      3. 8.6.3  Register TC1 (address = 0x02) [reset = 0x90]
      4. 8.6.4  Register TC2 (address = 0x03) [reset = 0xA0]
      5. 8.6.5  Register DIG_CONF (address = 0x04) [reset = 0x03]
      6. 8.6.6  Register ALT_CONFIG (address = 0x05) [reset = 0x00]
      7. 8.6.7  Register RP_THRESH_HI_LSB (address = 0x06) [reset = 0x00]
      8. 8.6.8  Register RP_THRESH_HI_MSB (address = 0x07) [reset = 0x00]
      9. 8.6.9  Register RP_THRESH_LO_LSB (address = 0x08) [reset = 0x00]
      10. 8.6.10 Register RP_THRESH_LO_MSB (address = 0x09) [reset = 0x00]
      11. 8.6.11 Register INTB_MODE (address = 0x0A) [reset = 0x00]
      12. 8.6.12 9.Register START_CONFIG (address = 0x0B) [reset = 0x01]
      13. 8.6.13 Register D_CONFIG (address = 0x0C) [reset = 0x00]
      14. 8.6.14 Register L_THRESH_HI_LSB (address = 0x16) [reset = 0x00]
      15. 8.6.15 Register L_THRESH_HI_MSB (address = 0x17) [reset = 0x00]
      16. 8.6.16 Register L_THRESH_LO_LSB (address = 0x18) [reset = 0x00]
      17. 8.6.17 Register L_THRESH_LO_MSB (address = 0x19) [reset = 0x00]
      18. 8.6.18 Register STATUS (address = 0x020 [reset = 0x00]
      19. 8.6.19 Register RP_DATA_LSB (address = 0x21) [reset = 0x00]
      20. 8.6.20 Register RP_DATA_MSB (address = 0x22) [reset = 0x00]
      21. 8.6.21 Register L_DATA_LSB (address = 0x23) [reset = 0x00]
      22. 8.6.22 Register L_DATA_MSB (address = 0x24) [reset = 0x00]
      23. 8.6.23 Register LHR_RCOUNT_LSB (address = 0x30) [reset = 0x00]
      24. 8.6.24 Register LHR_RCOUNT_MSB (address = 0x31) [reset = 0x00]
      25. 8.6.25 Register LHR_OFFSET_LSB (address = 0x32) [reset = 0x00]
      26. 8.6.26 Register LHR_OFFSET_MSB (address = 0x33) [reset = 0x00]
      27. 8.6.27 Register LHR_CONFIG (address = 0x34) [reset = 0x00]
      28. 8.6.28 Register LHR_DATA_LSB (address = 0x38) [reset = 0x00]
      29. 8.6.29 Register LHR_DATA_MID (address = 0x39) [reset = 0x00]
      30. 8.6.30 Register LHR_DATA_MSB (address = 0x3A) [reset = 0x00]
      31. 8.6.31 Register LHR_STATUS (address = 0x3B) [reset = 0x00]
      32. 8.6.32 Register RID (address = 0x3E) [reset = 0x02]
      33. 8.6.33 Register DEVICE_ID (address = 0x3F) [reset = 0xD4]
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  TI Designs and Application Notes
      2. 9.1.2  Theory of Operation
      3. 9.1.3  RP+L Mode Calculations
      4. 9.1.4  LDC1101 RP Configuration
      5. 9.1.5  Setting Internal Time Constant 1
      6. 9.1.6  Setting Internal Time Constant 2
      7. 9.1.7  MIN_FREQ and Watchdog Configuration
      8. 9.1.8  RP+L Sample Rate Configuration With RESP_TIME
      9. 9.1.9  High Resolution Inductance Calculation (LHR mode)
      10. 9.1.10 LHR Sample Rate Configuration With RCOUNT
      11. 9.1.11 Setting RPMIN for LHR Measurements
      12. 9.1.12 Sensor Input Divider
      13. 9.1.13 Reference Clock Input
      14. 9.1.14 INTB Reporting on SDO
      15. 9.1.15 DRDY (Data Ready) Reporting on SDO
      16. 9.1.16 Comparator Functionality
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Device Configuration for RP+L Measurement with an Example Sensor
        2. 9.2.2.2 Device Configuration for LHR Measurement with an Example Sensor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Power Planes
      2. 11.1.2 CLKIN Routing
      3. 11.1.3 Capacitor Placement
      4. 11.1.4 Sensor Connections
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

8 Detailed Description

8.1 Overview

The LDC1101 is an inductance-to-digital converter which can simultaneously measure the impedance and resonant frequency of an LC resonator. The high resolution measurement capability enables this device to be used to directly measure changes in physical systems, allowing the resonator to sense the proximity and movement of conductive materials.

The LDC1101 measures the impedance and resonant frequency by regulating the oscillation amplitude in a closed-loop configuration at a constant level, while monitoring the energy dissipated by the resonator. By monitoring the amount of power injected into the resonator, the LDC1101 can determine the equivalent parallel resistance of the resonator, RP, which it returns as a digital value.

In addition, the LDC1101 device also measures the oscillation frequency of the LC circuit by comparing the sensor frequency to a provided reference frequency. The sensor frequency can then be used to determine the inductance of the LC circuit.

The threshold comparator block can compare the RP+L conversion results versus a programmable threshold. With the threshold registers programmed and comparator enabled, the LDC1101 can provide a switch output, reported as a high/low level on the INTB/SDO pin.

The LDC1101 device supports a wide range of LC combinations with oscillation frequencies ranging from 500 kHz to 10 MHz and RP ranging from 1.25 kΩ to 90 kΩ. The device is configured and conversion results retrieved through a simple 4-wire SPI. The power supply for the device can range from 1.8 V – 5% to 3.3 V + 5%. The only external components necessary for operation are a 15 nF capacitor for internal LDO bypassing and supply bypassing for VDD.

8.2 Functional Block Diagram

LDC1101 ldc1101_block_diagram_snosd01.gif

8.3 Feature Description

8.3.1 Sensor Driver

The LDC1101 can drive a sensor with a resonant frequency of 500 kHz to 10 MHz with an RP in the range of 1.25 kΩ to 90 kΩ. The nominal sensor amplitude is 1.2 V. The sensor Q should be at least 10 for RP measurements. The inductive sensor must be connected across the INA and INB pins. The resonant frequency of the sensor is set by:

Equation 1. LDC1101 Eq01_fsensor_snosd01.gif

where

  • L is the sensor inductance in Henrys, and
  • C is the sensor parallel capacitance in Farads.

8.4 Device Functional Modes

8.4.1 Measurement Modes

The LDC1101 features two independent measurement subsystems to measure the impedance and resonant frequency of an attached sensor. The RP+L subsystem can simultaneously measure the impedance and resonant frequency of an LC resonator, with up to 16 bits of resolution for each parameter. Refer to RP+L Measurement Mode for more information on the RP+L measurement functionality.

The High Resolution L (LHR) subsystem measures the sensor resonant frequency with up to 24 bits of resolution. The effective resolution is a function of the sample rate and the reference frequency supplied on the CLKIN pin. Refer to High Resolution L (LHR) Measurement Mode for more information on the LHR measurement functionality.

Both measurement subsystems can convert simultaneously but at different sample intervals – the completion of an RP+L conversion will be asynchronous to the completion of a LHR conversion.

Table 1. Comparison of Measurement Modes

RP+L Mode LHR Mode
RP Measurement Resolution 16 bits N/A
L Measurement Resolution 16 bits 24 bits
Sample Rate configuration Varies with ƒSENSOR, set by RESP_TIME Fixed and set by RCOUNT field and ƒCLKIN
Sample rate at highest resolution (SPS) 244 15.3
Maximum Sample Rate (kSPS) 156.25 183.9
L Resolution at Maximum Sample rate 6.7 bits 6.5 bits
Switch Output on SDO/INTB Available for RP or L output code N/A

8.4.2 RP+L Measurement Mode

In RP+L mode, the LDC1101 will simultaneously measure the impedance and resonant frequency of the attached sensor. The device accomplishes this task by regulating the oscillation amplitude in a closed-loop configuration to a constant level, while monitoring the energy dissipated by the resonator. By monitoring the amount of power injected into the resonator, the LDC1101 device can determine the value of RP. The device returns this value as a digital value which is proportional to RP. In addition, the LDC1101 device can also measure the oscillation frequency of the LC circuit, by counting the number of cycles of a reference frequency. The measured sensor frequency can be used to determine the inductance of the LC circuit.

8.4.2.1 RPMIN and RPMAX

The variation of RP in a given system is typically much smaller than maximum range of 1.25 kΩ to >90 kΩ supported by the LDC1101. To achieve better resolution for systems with smaller RP ranges, the LDC1101 device offers a programmable RP range.

The LDC1101 uses adjustable current drives to scale the RP measurement range; by setting a tighter current range a higher accuracy RP measurement can be performed. This functionality can be considered as a variable gain amplifier (VGA) front end to an ADC. The current ranges are configured in the RPMIN and RPMAX fields of register RP_SET (address 0x01). Refer to LDC1101 RP Configuration for instructions to optimize these settings.

8.4.2.2 Programmable Internal Time Constants

The LDC1101 utilizes internal programmable registers to configure time constants necessary for sensor oscillation. These internal time constants must be configured for RP measurements. Refer to Setting Internal Time Constant 1 and Setting Internal Time Constant 2 for instructions on how to configure them for a given system.

8.4.2.3 RP+L Mode Measurement Sample Rate

The LDC1101 provides an adjustable sample rate for the RP+L conversion, where longer conversion times have higher resolution. Refer to RP+L Sample Rate Configuration With RESP_TIME for more details.

8.4.3 High Resolution L (LHR) Measurement Mode

The High Resolution L measurement (LHR) subsystem provides a high-resolution inductance (L) measurement of up to 24 bits. This L measurement can be configured to provide a higher resolution measurement than the measurement returned from the RP+L subsystem. The LHR subsystem also provides a constant conversion time interval, whereas the RP+L conversion interval is a function of the sensor frequency. The LHR measurement runs asynchronously with respect to the RP+L measurement. For more information on LHR mode resolution, refer to Optimizing L Measurement Resolution for the LDC161x and LDC1101 (SNOA944).

8.4.4 Reference Count Setting

The LHR sample rate is set by the Reference Count (LHR_RCOUNT) setting (registers 0x30 and 0x31). The LHR conversion resolution is proportional to the programmed RCOUNT value. With the maximum supported 16-MHz CLKIN input, the LDC1101 conversion interval can be set from 5.44 µs to 65.54 ms in 1-µs increments. Note that longer conversion intervals produce more accurate LHR measurements. Refer to LHR Sample Rate Configuration With RCOUNT for more details.

8.4.5 L-Only Measurement Operation

The LDC1101 can disable the RP measurement to perform a more stable L measurement. To enable this mode, set:

  • ALT_CONFIG.LOPTIMAL(register 0x05-bit0) = 1
  • D_CONFIG.DOK_REPORT (register 0x0C-bit0) = 1

When this mode is used, RP measurement results are not valid.

8.4.6 Minimum Sensor Frequency and Watchdog Setting

The LDC1101 can report an error condition if the sensor oscillation stops. Refer to MIN_FREQ and Watchdog Configuration for information on the configuration of the watchdog.

8.4.7 Low Power Modes

When continuous LDC conversions are not required, the LDC1101 supports two reduced power modes. In Sleep mode, the LDC1101 retains register settings and can quickly enter active mode for conversions. In Shutdown mode, power consumption is significantly lower, although the device configuration is not retained. While in either low power mode, the LDC1101 does not perform conversions.

8.4.7.1 Shutdown Mode

Shutdown mode is the lowest power state for the LDC1101. Note that entering SD mode will reset all registers to their default state, and so the device must have its registers rewritten. To enter Shutdown, perform the following sequence:

  1. Set ALT_CONFIG.SHUTDOWN_EN = 1 (register 0x05-bit[1]).
  2. Stop toggling the CLKIN pin input and drive the CLKIN pin Low.
  3. Set START_CONFIG.FUNC_MODE = b10 (register 0x0B:bits[1:0]). This register can be written while the LDC1101 is in active mode; on completion of the register write the LDC1101 will enter shutdown.

To exit Shutdown mode, resume toggling the clock input on the CLKIN pin; the LDC1101 transitions to Sleep mode with the default register values.

While in Shutdown mode, no conversions are performed. In addition, entering Shutdown mode clears the status registers; if an error condition is present it is be reported when the device exits Shutdown mode.

8.4.7.2 Sleep Mode

Sleep mode is entered by setting START_CONFIG.FUNC_MODE =b01 (register 0x0B:bits[1:0]). While in this mode, the register contents are maintained. To exit Sleep mode and start active conversions, set START_CONFIG.FUNC_MODE = b00. While in Sleep mode the SPI interface is functional so that register reads and writes can be performed.

On power-up or exiting Shutdown mode, the LDC1101 is in Sleep mode.

Configuring the LDC1101 must be done while the device is in Sleep mode. If a setting on the LDC1101 needs to be changed, return the device to Sleep mode, change the appropriate register, and then return the LDC1101 to conversion mode. The registers related to INTB reporting can be changed while the LDC1101 is in active mode. Refer to INTB Reporting on SDO for more details.

8.4.8 Status Reporting

The LDC1101 provides 2 status registers, STATUS and LHR_STATUS, to report on the device and sensor condition.

Table 2. STATUS Fields

NAME FIELD FUNCTION
NO_SENSOR_OSC 7 When the resonance impedance of the sensor, RP, drops below the programed Rp_MIN, the sensor oscillation may stop. This condition is reported by STATUS:NO_SENSOR_OSC (register 0x20-bit7). This condition could occur when a target comes too close to the sensor or if RP_SET:RP_MIN (register 0x01-bits[2:0]) is set too high.
DRDYB 6 RP+L Data Ready - reports completion of RP+L conversion results
RP_HIN 5 RP+L threshold – refer to Comparator Functionality for details
RP_HI_LON 4
L_HIN 3
L_HI_LON 2
POR_READ 0 Device in Power-On Reset – device should only be configured when POR_READ = 0.

The LHR_STATUS register (register 0x3B) reports on LHR functionality.

8.4.9 Switch Functionality and INTB Reporting

The SDO pin can generate INTB, a signal which corresponds to device status. INTB can report conversion completion or provide a comparator output, in which the LDC conversion results are internally compared to programmable thresholds. Refer to INTB Reporting on SDO for details.

8.5 Programming

8.5.1 SPI Programming

The LDC1101 uses SPI to configure the internal registers. It is necessary to configure the LDC1101 while in Sleep mode. If a setting on the LDC1101 needs to be changed, return the device to Sleep mode, change the appropriate register, and then return the LDC1101 to conversion mode. CSB must go low before accessing first address. If the number of SCLK pulses is less than 16, a register write command does not change the contents of the addressed register.

LDC1101 spi_transaction_format_snosd01.gif Figure 12. SPI Transaction Format

The LDC1101 supports an extended SPI transaction, in which CSB is held low and sequential register addresses can be written or read. After the first register transaction, each additional 8 SCLK pulses addresses the next register, reading or writing based on the initial R/W flag in the initial command. A register write command takes effect on the 8th clock pulse. Two or more registers can be programmed using this method. The register address must not increment above 0x3F.

LDC1101 extended_spi_transaction_snosd01.gif Figure 13. Extended SPI Transaction

8.6 Register Maps

Table 3. Register List

ADDRESS NAME DEFAULT VALUE DESCRIPTION
0x01 RP_SET 0x07 Configure RP Measurement Dynamic Range
0x02 TC1 0x90 Configure Internal Time Constant 1
0x03 TC2 0xA0 Configure Internal Time Constant 2
0x04 DIG_CONFIG 0x03 Configure RP+L conversion interval
0x05 ALT_CONFIG 0x00 Configure additional device settings
0x06 RP_THRESH_H_LSB 0x00 RP_THRESHOLD High Setting – bits 7:0. This register can be modified while the LDC1101 is in active mode.
0x07 RP_THRESH_H_MSB 0x00 RP_THRESHOLD High Setting – bits 15:8. This register can be modified while the LDC1101 is in active mode.
0x08 RP_THRESH_L_LSB 0x00 RP_THRESHOLD Low Setting – bits 7:0. This register can be modified while the LDC1101 is in active mode.
0x09 RP_THRESH_L_MSB 0x00 RP_THRESHOLD Low Setting – bits 15:8. This register can be modified while the LDC1101 is in active mode.
0x0A INTB_MODE 0x00 Configure INTB reporting on SDO pin. This register can be modified while the LDC1101 is in active mode.
0x0B START_CONFIG 0x01 Configure Power State
0x0C D_CONF 0x00 Sensor Amplitude Control Requirement
0x16 L_THRESH_HI_LSB 0x00 L_THRESHOLD High Setting – bits 7:0. This register can be modified while the LDC1101 is in active mode.
0x17 L_THRESH_HI_MSB 0x00 L_THRESHOLD High Setting – bits 15:8. This register can be modified while the LDC1101 is in active mode.
0x18 L_THRESH_LO_LSB 0x00 L_THRESHOLD Low Setting – bits 7:0. This register can be modified while the LDC1101 is in active mode.
0x19 L_THRESH_LO_MSB 0x00 L_THRESHOLD Low Setting – bits 15:8. This register can be modified while the LDC1101 is in active mode.
0x20 STATUS 0x00 Report RP+L measurement status
0x21 RP_DATA_LSB 0x00 RP Conversion Result Data Output - bits 7:0
0x22 RP_DATA_MSB 0x00 RP Conversion Result Data Output - bits 15:8
0x23 L_DATA_LSB 0x00 L Conversion Result Data Output - bits 7:0
0x24 L_DATA_MSB 0x00 L Conversion Result Data Output - bits 15:8
0x30 LHR_RCOUNT_LSB 0x00 High Resolution L Reference Count – bits 7:0
0x31 LHR_RCOUNT_MSB 0x00 High Resolution L Reference Count – bits 15:8
0x32 LHR_OFFSET_LSB 0x00 High Resolution L Offset – bits 7:0
0x33 LHR_OFFSET_MSB 0x00 High Resolution L Offset – bits 15:8
0x34 LHR_CONFIG 0x00 High Resolution L Configuration
0x38 LHR_DATA_LSB 0x00 High Resolution L Conversion Result Data output - bits 7:0
0x39 LHR_DATA_MID 0x00 High Resolution L Conversion Result Data output - bits 15:8
0x3A LHR_DATA_MSB 0x00 High Resolution L Conversion Result Data output - bits 23:16
0x3B LHR_STATUS 0x00 High Resolution L Measurement Status
0x3E RID 0x02 Device RID value
0x3F CHIP_ID 0xD4 Device ID value

8.6.1 Individual Register Listings

Fields indicated with Reserved must be written only with indicated values. Improper device operation may occur otherwise. The R/W column indicates the Read-Write status of the corresponding field. A ‘R/W’ entry indicates read and write capability, a ‘R’ indicates read-only, and a ‘W’ indicates write-only.

8.6.2 Register RP_SET (address = 0x01) [reset = 0x07]

Figure 14. Register RP_SET
7 6 5 4 3 2 1 0
HIGH_Q_SENSOR RP_MAX RESERVED RP_MIN
R/W R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 4. Register RP_SET Field Descriptions

Bit Field Type Reset Description
7 HIGH_Q_SENSOR R/W 0 High Q Sensor optimization -RPMAX_DIS

This setting improves the RP measurement accuracy for very high Q coils by driving 0A as the RPMAX current drive. Typically, sensors with Q > 50 can benefit from enabling this mode.

b0: Programmed RP_MAX is driven (default value)
b1: RP_MAX current is ignored; current drive is off.

6:4 RP_MAX R/W b000 RP_MAX Setting

Set the maximum input dynamic range for the sensor RP measurement. The programmed RP_MIN setting must not exceed the programmed RP_MAX setting.

b000: RPMAX = 96 kΩ (default value)
b001: RPMAX = 48 kΩ
b010: RPMAX = 24 kΩ
b011: RPMAX = 12 kΩ
b100: RPMAX = 6 kΩ
b101: RPMAX = 3 kΩ
b110: RPMAX = 1.5 kΩ
b111: RPMAX = 0.75 kΩ
3 RESERVED R/W 0 Reserved. Set to 0
2:0 RP_MIN R/W b111 RP_MIN Setting

Set the minimum input dynamic range for the sensor RP measurement. The programmed RP_MIN setting must not exceed the programmed RP_MAX setting.

b000: RPMIN = 96 kΩ
b001: RPMIN = 48 kΩ
b010: RPMIN = 24 kΩ
b011: RPMIN = 12 kΩ
b100: RPMIN = 6 kΩ
b101: RPMIN = 3 kΩ
b110: RPMIN = 1.5 kΩ
b111: RPMIN = 0.75 kΩ (default value)

8.6.3 Register TC1 (address = 0x02) [reset = 0x90]

Figure 15. Register TC1
7 6 5 4 3 2 1 0
C1 RESERVED R1
R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5. Register TC1 Field Descriptions

Bit Field Type Reset Description
7:6 C1 R/W b10 Internal Time Constant 1 Capacitance

This sets the capacitive component used to configure internal time constant 1. Refer to Setting Internal Time Constant 1 for more details.

b00: C1 = 0.75 pF
b01: C1 = 1.5 pF
b10: C1 = 3 pF (default value)
b11: C1 = 6 pF
5 RESERVED R/W 0 Reserved. Set to 0
4:0 R1 R/W b1'0000 Internal Time Constant 1 Resistance

This sets the resistive component used to configure internal time constant 1. Refer to Setting Internal Time Constant 1 for configuration details.

R1(Ω) = –12.77 kΩ × R1 + 417 kΩ

Valid Values: [b0’0000:b1’1111]
b0’0000: R1 = 417 kΩ
b1’0000: R1 = 212.7kΩ (default value)
b1’1111: R1 = 21.1 kΩ

8.6.4 Register TC2 (address = 0x03) [reset = 0xA0]

Figure 16. Register TC2
7 6 5 4 3 2 1 0
C2 R2
R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 6. Register TC2 Field Descriptions

Bit Field Type Reset Description
7:6 C2 R/W b10 Internal Time Constant 2 Capacitance

This sets the capacitive component used to configure internal time constant 2. Refer to Setting Internal Time Constant 2 for configuration details.

b00: C2 = 3 pF
b01: C2 = 6 pF
b10: C2 = 12 pF (default value)
b11: C2 = 24 pF
5:0 R2 R/W b10'0000 Internal Time Constant 2 Resistance

This sets the resistive component used to configure internal time constant 2. Refer to Setting Internal Time Constant 2 for details.

R2(Ω) = -12.77 kΩ × R2 + 835 kΩ
Valid Values: [b00’0000:b11’1111]
b00’0000: R2 = 835kΩ
b10’0000: R2 = 426.4 kΩ (default value)
b11’1111: R2 = 30.5 kΩ

8.6.5 Register DIG_CONF (address = 0x04) [reset = 0x03]

Figure 17. Register DIG_CONF
7 6 5 4 3 2 1 0
MIN_FREQ RESERVED RESP_TIME
R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 7. Register DIG_CONF Field Descriptions

Bit Field Type Reset Description
7:4 MIN_FREQ R/W 0x0 Sensor Minimum Frequency

Configure this register based on the lowest possible sensor frequency. This is typically when the target is providing minimum interaction with the sensor, although with some steel and ferrite targets, the minimum sensor frequency occurs with maximum target interaction.

This setting should include any additional effects which reduce the sensor frequency, including temperature shifts and sensor capacitor variation.

MIN_FREQ = 16 – (8 MHz ÷ ƒSENSORMIN)

b0000: ƒSENSORMIN = 500 kHz (default value)
b1111: ƒSENSORMIN = 8 MHz

3 RESERVED R/W 0 Reserved. Set to 0
2:0 RESP_TIME R/W b011 Measurement Response Time Setting

Sets the Response Time, which is the number of sensor periods used per conversion. This setting applies to the RP and Standard Resolution L measurement, but not the High Resolution L measurement. This corresponds to the actual conversion time by:

LDC1101 InlineEq_conv_snosd01.gif

b000: Reserved (do not use)
b001: Reserved (do not use)
b010: Response Time = 192
b011: Response Time = 384 (default value)
b100: Response Time = 768
b101: Response Time = 1536
b110: Response Time = 3072
b111: Response Time = 6144

8.6.6 Register ALT_CONFIG (address = 0x05) [reset = 0x00]

Figure 18. Register ALT_CONFIG
7 6 5 4 3 2 1 0
RESERVED SHUTDOWN_EN LOPTIMAL
R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 8. Register ALT_CONFIG Field Descriptions

Bit Field Type Reset Description
7:2 RESERVED R/W b00'0000 Reserved. Set to b00'0000.
1 SHUTDOWN_EN R/W 0 Shutdown Enable

Enables shutdown mode of operation. If SHUTDOWN_EN is not set to 1, then SHUTDOWN (Address 0x0B:[1]) does not have any effect.

b0: Shutdown not enabled (default value).
b1: Shutdown functionality enabled.
0 LOPTIMAL R/W 0 Optimize for L Measurements

Optimize sensor drive signal for L measurements (for both High-Res L and L measurement). When LOPTIMAL is enabled, RP measurements are not completed. It is also necessary to set DOK_REPORT=1 when this mode is enabled.

b0: L optimal disabled; both RP+L/LHR measurements (default value).
b1: Only perform LHR and/or L-only measurements. RP measurements are invalid.

8.6.7 Register RP_THRESH_HI_LSB (address = 0x06) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 19. Register RP_THRESH_HI_LSB
7 6 5 4 3 2 1 0
RP_THRESH_HI_LSB
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 9. Register RP_THRESH_HI_LSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_THRESH_HI_LSB R/W 0x00 RP High Threshold LSB Setting

Combine with value in Register RP_THRESH_HI_MSB (Address 0x07) to set the upper RP conversion threshold:

RP_THRESH_HI = RP_THRESH_HI[15:8] × 256 + RP_THRESH_HI[7:0]

If RP_DATA conversion result is greater than the RP_THRESH_HI, RP_TH_I is asserted.

Note that RP_THRESH_HI_LSB is buffered and does not change the device configuration until a write to RP_TRESH_HI_MSB is performed. Note that both registers 0x06 and 0x07 must be written to change the value of RP_THRESH_HI.

0x00: default value

8.6.8 Register RP_THRESH_HI_MSB (address = 0x07) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 20. Register RP_THRESH_HI_MSB
7 6 5 4 3 2 1 0
RP_THRESH_HI_MSB
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 10. Register RP_THRESH_HI_MSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_THRESH_HI_MSB R/W 0x00 RP High Threshold MSB Setting

Combine with value in Register RP_THRESH_HI_LSB (Address 0x06) to set the upper RP conversion threshold.

0x00: default value

8.6.9 Register RP_THRESH_LO_LSB (address = 0x08) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 21. Register RP_THRESH_LO_LSB
7 6 5 4 3 2 1 0
RP_THRESH_LO_LSB
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 11. Register RP_THRESH_LO_LSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_THRESH_LO[7:0] R/W 0x00 RP Low Threshold LSB Setting

Combine with value in Register RP_THRESH_LO_MSB (Address 0x09) to set the lower RP conversion threshold:


RP_THRESH_LO = RP_THRESH_LO[15:8] ×256 + RP_THRESH_LO[7:0]

If RP_DATA conversion result is less than the RP_THRESH_LO, RP_HI_LON is asserted. Note that RP_THRESH_LO_LSB is buffered and does not change the device configuration until a write to RP_TRESH_LO_MSB is performed.

Note that both registers 0x08 and 0x09 must be written to change the value of RP_THRESH_LO.

0x00: default value

8.6.10 Register RP_THRESH_LO_MSB (address = 0x09) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode

Figure 22. Register RP_THRESH_LO_MSB
7 6 5 4 3 2 1 0
RP_THRESH_LO_MSB
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12. Register RP_THRESH_LO_MSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_THRESH_LO_MSB[15:8] R/W 0x00 RP Low Threshold MSB Setting

Combine with value in Register RP_THRESH_LO_LSB (Address 0x08) to set the lower RP conversion threshold.

0x00: default value

8.6.11 Register INTB_MODE (address = 0x0A) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 23. Register INTB_MODE
7 6 5 4 3 2 1 0
INTB2SDO RESERVED INTB_FUNC
R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 13. INTB_MODE Field Descriptions

Bit Field Type Reset Description
7 INTB2SDO R/W 0 INTB Output on SDO

Output INTB signal on SDO pin.

b0: do not report INTB on SDO pin (default value)
b1: report INTB on SDO pin
6 RESERVED R/W 0 Reserved. Set to 0
5:0 INTB_FUNC R/W b00'0000 Select INTB signal reporting. INTB2SDO must be set to 1 for the selected signal to appear on the SDO pin. Refer to INTB Reporting on SDO for configuration details.

b10’0000: Report LHR Data Ready
b01’0000: Compare L conversion to L Thresholds (hysteresis)
b00’1000: Compare L conversion to L High Threshold (latching)
b00’0100: Report RP+L Data Ready
b00’0010: Compare RP conversion to RP Thresholds (hysteresis)
b00’0001: Compare RP conversion to RP High Threshold (latching)
b00’0000: no output (default value)
All other values: Reserved

8.6.12 9.Register START_CONFIG (address = 0x0B) [reset = 0x01]

This register can be modified while the LDC1101 is in active mode.

Figure 24. Register START_CONFIG
7 6 5 4 3 2 1 0
RESERVED FUNC_MODE
R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 14. Register START_CONFIG Field Descriptions

Bit Field Type Reset Description
7:2 RESERVED R/W b00'0000 Reserved. Set to b00’0000
1:0 FUNC_MODE R/W b01 Functional Mode

Configure functional mode of device. In active mode, the device performs conversions. When in Sleep mode, the LDC1101 is in a reduced power mode; the device should be configured in this mode. Shutdown mode is a minimal current mode in which the device configuration is not retained.

Note that SHUTDOWN_EN must be set to 1 prior to setting FUNC_MODE to b10.

b00: Active conversion mode
b01: Sleep mode (default value)
b10: Set device to shutdown mode
b11: Reserved

8.6.13 Register D_CONFIG (address = 0x0C) [reset = 0x00]

Figure 25. Register D_CONFIG
7 6 5 4 3 2 1 0
RESERVED DOK_REPORT
R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 15. Register D_CONFIG Field Descriptions

Bit Field Type Reset Description
7:1 RESERVED R/W b000'0000 Reserved.
Set to b000’0000.
0 DOK_REPORT R/W 0 Sensor Amplitude Control

Continue to convert even if sensor amplitude is not regulated.

b0: Require amplitude regulation for conversion (default value)
b1: LDC continues to convert even if sensor amplitude is unable to maintain regulation.

8.6.14 Register L_THRESH_HI_LSB (address = 0x16) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 26. Register L_THRESH_HI_LSB
7 6 5 4 3 2 1 0
L_THRESH_HI[7:0]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 16. Register L_THRESH_HI_LSB Field Descriptions

Bit Field Type Reset Description
7:0 L_THRESH_HI[7:0] R/W 0x00 L High Threshold LSB Setting

Combine with value in Register L_THRESH_HI_MSB (Address 0x17) to set the upper L conversion threshold:

LThreshHI = L_THRESH_HI[15:8] ×256 + L_THRESH_HI[7:0]

If L_DATA conversion result is greater than the L_THRESH_HI, L_HIN is asserted. Note that L_THRESH_HI_LSB is buffered and does not change the device configuration until a write to L_TRESH_HI_MSB.

0x00: default value

8.6.15 Register L_THRESH_HI_MSB (address = 0x17) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 27. Register L_THRESH_HI_MSB
7 6 5 4 3 2 1 0
L_THRESH_HI[15:8]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 17. Register L_THRESH_HI_MSB Field Descriptions

Bit Field Type Reset Description
7:0 L_THRESH_HI[15:8] R/W 0x00 L High Threshold MSB Setting

Combine with value in Register L_THRESH_HI_LSB (Address 0x16) to set the upper L conversion threshold.

0x00: default value

8.6.16 Register L_THRESH_LO_LSB (address = 0x18) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 28. Register L_THRESH_LO_LSB
7 6 5 4 3 2 1 0
L_THRESH_L[7:0]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 18. Register L_THRESH_LO_LSB Field Descriptions

Bit Field Type Reset Description
7:0 L_THRESH_LO[7:0] R/W 0x00 L Low Threshold LSB Setting

Combine with value in Register L_THRESH_LO_MSB (Address 0x19) to set the lower L conversion threshold:

LThreshLO = L_THRESH_LO[15:8] ×256 + L_THRESH_LO[7:0]

If L_DATA conversion result is less than the L_THRESH_LO, L_HI_LON is asserted.

Note that L_THRESH_LO_LSB is buffered and does not change the device configuration until a write to L_TRESH_LO_MSB.

0x00: default value

8.6.17 Register L_THRESH_LO_MSB (address = 0x19) [reset = 0x00]

This register can be modified while the LDC1101 is in active mode.

Figure 29. L_THRESH_LO_MSB
7 6 5 4 3 2 1 0
L_THRESH_L[15:8]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 19. L_THRESH_LO_MSB Field Descriptions

Bit Field Type Reset Description
7:0 L_THRESH_LO[15:8] R/W 0x00 L Low Threshold MSB Setting

Combine with value in Register L_THRESH_LO_LSB (Address 0x18) to set the lower L conversion threshold.

0x00: default value

8.6.18 Register STATUS (address = 0x020 [reset = 0x00]

Figure 30. Register STATUS
7 6 5 4 3 2 1 0
NO_SENSOR_OSC DRDYB RP_HIN RP_HI_LON L_HIN L_HI_LON RESERVED POR_READ
R R R R R R R R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 20. Register STATUS Field Descriptions

Bit Field Type Reset Description
7 NO_SENSOR_OSC R 0 Sensor Oscillation Not Present Error

Indicates that the sensor has stopped oscillating. This error may also be produced if the MIN_FREQ is set to too high a value.

b0: Error condition has not occurred
b1: LDC1101 has not detected the sensor oscillation.
6 DRDYB R 0 RP+L Data Ready
b0: New RP+L conversion data is available.
b1: No new conversion data is available.
5 RP_HIN R 0 RP_DATA High Threshold Comparator

Note this field latches a low value. To clear, write 0x00 to register 0x0A. INTB_FUNC (register 0x0A:bits[5:0]) must be set to b00'0001 for this flag to be reported.

b0: RP_DATA measurement has exceeded RP_THRESH_HI
b1: RP_DATA measurement has not exceeded RP_THRESH_HI
4 RP_HI_LON R 0 RP_DATA Hysteresis Comparator
b0: RP_DATA measurement has gone above RP_THRESH_HI.
b1: RP_DATA measurement has gone below RP_THRESH_LO.
3 L_HIN R 0 L_DATA High Threshold Comparator

Note this field latches a low value. To clear, write 0x00 to register 0x0A. INTB_FUNC (register 0x0A:bits[5:0]) must be set to b00'1000 for this flag to be reported.

b0: L_DATA measurement has exceeded L_THRESH_HI
b1: L_DATA measurement has not exceeded L_THRESH_HI
2 L_HI_LON R 0 L_DATA Hysteresis Comparator
b0: L_DATA measurement has gone above L_THRESH_HI.
b1: L_DATA measurement has gone below L_THRESH_LO.
1 RESERVED R 0 No Function
0: default value
0 POR_READ R 0 Device in Power-On-Reset

Indicates the device is in process of resetting. Note that the device cannot accept any configuration changes until reset is complete. Wait until POR_READ = 0 before changing any device configuration.

b0: Device is not in reset.
b1: Device is currently in reset; wait until POR_READ = 0.

8.6.19 Register RP_DATA_LSB (address = 0x21) [reset = 0x00]

NOTE: RP_DATA_LSB (Address 0x21) must be read prior to reading the RP_DATA_MSB (Address 0x22), L_DATA_MSB (Address 0x23), and L_DATA_MSB (Address 0x24) registers to properly retrieve conversion results.

Figure 31. Register RP_DATA_LSB
7 6 5 4 3 2 1 0
RP_DATA[7:0]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 21. Register RP_DATA_LSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_DATA[7:0] R 0x00 RP-Measurement Conversion Result

Combine with values in Register RP_DATA_MSB (Address 0x22) to determine RP conversion result:

RP_DATA = RP_DATA[15:8]×256 + RP_DATA[7:0]

8.6.20 Register RP_DATA_MSB (address = 0x22) [reset = 0x00]

NOTE: RP_DATA_LSB (Address 0x21) must be read prior to reading this register to properly retrieve conversion results.

Figure 32. Register RP_DATA_MSB
7 6 5 4 3 2 1 0
RP_DATA[15:8]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 22. Register RP_DATA_MSB Field Descriptions

Bit Field Type Reset Description
7:0 RP_DATA[15:8] R 0x00 RP-Measurement Conversion Result

Combine with values in Register RP_DATA_LSB (Address 0x21) to determine RP conversion result:

8.6.21 Register L_DATA_LSB (address = 0x23) [reset = 0x00]

NOTE: RP_DATA_LSB (Address 0x21) must be read prior to reading this register to properly retrieve conversion results.

Figure 33. Register L_DATA_LSB
7 6 5 4 3 2 1 0
L_DATA[7:0]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 23. Register L_DATA_LSB Field Descriptions

Bit Field Type Reset Description
7:0 L_DATA[7:0] R 0x00 L-Measurement Conversion Result

Combine with values in Register L_DATA_MSB (Address 0x24) to determine L conversion result:

L_DATA = L_DATA[15:8]×256 + L_DATA[7:0]

fSENSOR = ( fCLKIN ˣ RESP_TIME) / (3 ˣ L_DATA)

8.6.22 Register L_DATA_MSB (address = 0x24) [reset = 0x00]

NOTE: RP_DATA_LSB (Address 0x21) must be read prior to reading this register to properly retrieve conversion results.

Figure 34. Register L_DATA_MSB
7 6 5 4 3 2 1 0
L_DATA[15:8]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 24. Register L_DATA_MSB Field Descriptions

Bit Field Type Reset Description
7:0 L_DATA[15:8] R 0x00 L-Measurement Conversion Result

Combine with values in Register L_DATA_LSB (Address 0x23) to determine L conversion result.

8.6.23 Register LHR_RCOUNT_LSB (address = 0x30) [reset = 0x00]

Figure 35. Register LHR_RCOUNT_LSB
7 6 5 4 3 2 1 0
RCOUNT[7:0]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 25. Register LHR_RCOUNT_LSB Field Descriptions

Bit Field Type Reset Description
7:0 RCOUNT[7:0] R/W 0x00 High Resolution L-Measurement Reference Count Setting

Combine with value in Register LHR_RCOUNT_MSB (Address 0x31) to set the measurement time for High Resolution L Measurements.

0x00: default value

8.6.24 Register LHR_RCOUNT_MSB (address = 0x31) [reset = 0x00]

Figure 36. Register LHR_RCOUNT_MSB
7 6 5 4 3 2 1 0
RCOUNT[15:8]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 26. Register LHR_RCOUNT_MSB Field Descriptions

Bit Field Type Reset Description
7:0 RCOUNT[15:8] R/W 0x00 High Resolution L-Measurement Reference Count Setting

Combine with value in Register LHR_RCOUNT_LSB (Address 0x30) to set the measurement time for High Resolution L Measurements.

Higher values for LHR_RCOUNT have a higher effective measurement resolution but a lower sample rate. Refer to LHR Sample Rate Configuration With RCOUNT for more details.

Measurement Time (tCONV)= (RCOUNT[15:0] ˣ 16 + 55)/fCLKIN

RCOUNT = RCOUNT [15:8]×256 + RCOUNT [7:0]
Valid range: 2 ≤ RCOUNT[15:0] ≤ 65535
0x00: default value

8.6.25 Register LHR_OFFSET_LSB (address = 0x32) [reset = 0x00]

Figure 37. Register LHR_OFFSET_LSB
7 6 5 4 3 2 1 0
LHR_OFFSET[7:0]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 27. Register LHR_OFFSET_LSB Field Descriptions

Bit Field Type Reset Description
7:0 LHR_OFFSET[7:0] R/W 0x00 High Resolution L-Measurement Offset Setting

Combine with value in Register LHR_OFFSET_LSB (Address 0x32) to set the offset value applied to High Resolution L Measurements.

0x00: default value

8.6.26 Register LHR_OFFSET_MSB (address = 0x33) [reset = 0x00]

Figure 38. Register LHR_OFFSET_MSB
7 6 5 4 3 2 1 0
LHR_OFFSET[15:8]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 28. Register LHR_OFFSET_MSB Field Descriptions

Bit Field Type Reset Description
7:0 LHR_OFFSET[15:8] R/W 0x00 High Resolution L-Measurement Offset Setting

Combine with value in Register LHR_OFFSET_LSB (Address 0x32) to set the offset value applied to High Resolution L Measurements.

0x00: default value

8.6.27 Register LHR_CONFIG (address = 0x34) [reset = 0x00]

Figure 39. Register LHR_CONFIG
7 6 5 4 3 2 1 0
RESERVED SENSOR_DIV
R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 29. Register LHR_CONFIG Field Descriptions

Bit Field Type Reset Description
7:2 RESERVED R/W b00'0000 Reserved.
Set to b00’0000
1:0 SENSOR_DIV R/W b00 Sensor Clock Divider Setting

Divide the sensor frequency by programmed divider. This divider can be used to set the sensor frequency lower than the reference frequency. Refer to Sensor Input Divider for more details.

b00: Sensor Frequency not divided (default value)
b01: Sensor Frequency divided by 2
b10: Sensor Frequency divided by 4
b11: Sensor Frequency divided by 8

8.6.28 Register LHR_DATA_LSB (address = 0x38) [reset = 0x00]

NOTE: The LHR_DATA_X registers must be read in the sequence LHR_DATA_LSB (Address 0x38) first, then LHR_DATA_MID (Address 0x39), and last LHR_DATA_MSB (Address 0x3A) to ensure correct data.

Figure 40. Register LHR_DATA_LSB
7 6 5 4 3 2 1 0
LHR_DATA[7:0]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 30. Register LHR_DATA_LSB Field Descriptions

Bit Field Type Reset Description
7:0 LHR_DATA[7:0] R 0x00 High Resolution L-Measurement Conversion Result

Combine with values in Registers LHR_DATA_MID (Address 0x39) and LHR_DATA_MSB (Address 0x3A) to determine conversion result. When LHR_OFFSET =0x0000, ƒSENSOR can be determined by: ƒSENSOR = ƒCLKIN × 2SENSOR_DIV × LHR_DATA ÷ 224

8.6.29 Register LHR_DATA_MID (address = 0x39) [reset = 0x00]

NOTE: The LHR_DATA_X registers must be read in the sequence LHR_DATA_LSB (Address 0x38) first, then LHR_DATA_MID (Address 0x39), and last LHR_DATA_MSB (Address 0x3A) to ensure correct data.

Figure 41. Register LHR_DATA_MID
7 6 5 4 3 2 1 0
LHR_DATA[15:8]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 31. Register LHR_DATA_MID Field Descriptions

Bit Field Type Reset Description
7:0 LHR_DATA[15:8] R 0x00 High Resolution L-Measurement Conversion Result

Combine with values in Registers LHR_DATA_LSB (Address 0x38) and LHR_DATA_MSB (Address 0x3A) to determine conversion result.

8.6.30 Register LHR_DATA_MSB (address = 0x3A) [reset = 0x00]

NOTE: The LHR_DATA_X registers must be read in the sequence LHR_DATA_LSB (Address 0x38) first, then LHR_DATA_MID (Address 0x39), and last LHR_DATA_MSB (Address 0x3A) to ensure correct data.

Figure 42. Register LHR_DATA_MSB
7 6 5 4 3 2 1 0
LHR_DATA[23:16]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 32. Register LHR_DATA_MSB Field Descriptions

Bit Field Type Reset Description
7:0 LHR_DATA[23:16] R 0x00 High Resolution L-Measurement Conversion Result

Combine with values in Registers LHR_DATA_LSB (Address 0x38) and LHR_DATA_MID (Address 0x39) to determine conversion result.

8.6.31 Register LHR_STATUS (address = 0x3B) [reset = 0x00]

Figure 43. Register LHR_STATUS
7 6 5 4 3 2 1 0
UNUSED ERR_ZC ERR_OR ERR_UR ERR_OF LHR_DRDY
R R R R R R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 33. Register LHR_STATUS Field Descriptions

Bit Field Type Reset Description
7:5 UNUSED R 0 No Function
4 ERR_ZC R 0 Zero Count Error

Zero count errors are applicable for LHR measurements and indicate that no cycles of the sensor occurred in the programmed measurement interval. This indicates either a sensor error or the sensor frequency is too low. This field is updated after register 0x38 has been read.

b0: No Zero Count error has occurred for the last LHR conversion result read.
b1: A Zero Count error has occurred.
3 ERR_OR R 0 Conversion Over-range Error

Conversion over-range errors are applicable for LHR measurements and indicate that the sensor frequency exceeded the reference frequency. This field is updated after register 0x38 has been read.

b0: No Conversion Over-range error has occurred for the last LHR conversion result read.
b1: A Conversion Over-range error has occurred.
2 ERR_UR R 0 Conversion Under-range Error

Conversion under-range errors are applicable for LHR measurements and indicate that the output code is negative; this occurs when programmed LHR offset register value is too large. This field is updated after register 0x38 has been read.

b0: No Conversion Under-range error has occurred for the last LHR conversion result read.
b1: A Conversion Under-range error has occurred.
1 ERR_OF R 0 Conversion Over-flow Error

Conversion over-flow errors are applicable for LHR measurements and indicate that the sensor frequency is too close to the reference frequency. This field is updated after register 0x38 has been read.

b0: No Conversion Over-flow error has occurred for the last LHR conversion result read.
b1: A Conversion Over-flow error has occurred.
0 LHR_DRDY R 0 LHR Data Ready

b0: Unread LHR conversion data is available. This field is set to 0 at the end of an LHR conversion and remains asserted until a read of register 0x38.
b1: No unread LHR conversion data is available.

8.6.32 Register RID (address = 0x3E) [reset = 0x02]

Figure 44. Register RID
7 6 5 4 3 2 1 0
V_ID RID
R R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 34. Register RID Field Descriptions

Bit Field Type Reset Description
7:3 V_ID R b00'0000 DEVICE ID

Returns fixed value indicating device ID.

b0'0000: indicates LDC1101 (default value)
2:0 RID R b010 RID

Returns device RID.

b010: Default value

8.6.33 Register DEVICE_ID (address = 0x3F) [reset = 0xD4]

Figure 45. Register DEVICE_ID
7 6 5 4 3 2 1 0
CHIP_ID
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 35. Register DEVICE_ID Field Descriptions

Bit Field Type Reset Description
7:0 CHIP_ID R 0xD4 CHIP_ID

Returns fixed value indicating device Family ID.

0xD4: indicates LDC1101 family (default value)