SNOSD12D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
    8. 6.8 Timing Diagrams
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bootstrap Diode Operation
      2. 7.3.2 LDO Operation
      3. 7.3.3 Dead Time Selection
      4. 7.3.4 Overtemperature Protection
      5. 7.3.5 High-Performance Level Shifter
      6. 7.3.6 Negative HS Voltage Handling
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Bypass Capacitor
        2. 8.2.2.2 Bootstrap Diode Selection
        3. 8.2.2.3 Handling Ground Bounce
        4. 8.2.2.4 Independent Input Mode
        5. 8.2.2.5 Computing Power Dissipation
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.6 Negative HS Voltage Handling

The LMG1210 by itself can operate with -200V on the HS pin as stated in the recommended operating conditions table. However, if using a bootstrap diode, the system will be more limited based on the potential of high-currents flowing through the bootstrap diode.

HS goes most negative during the dead times when the low-side FET is off. This also means the bootstrap switch is off so the BST pin is relatively high impedance. Therefore as HS goes negative, the bootstrap diode becomes forward biased and pulls the voltage at BST down with it. Because the bootstrap switch is off, very little current will flow until the bootstrap diode attempts to pull the BST pin below ground at which point the ESD diode on the BST pin will clamp the voltage at a diode drop below ground. The point where significant current begins to flow through the bootstrap diode is given in Equation 6

Equation 6. VHS = – VBST – VESD – (VHB – VHS)

Where VBST is the forward voltage drop of the selected bootstrap diode and VESD is the forward voltage drop of the ESD diode of the BST pin which is typically 0.7V at room temp. Figure 15 shows a schematic of this current path.

LMG1210 Negative_voltage_HS.gifFigure 15. Current Path Across Bootstrap Diode

Once this negative voltage is exceeded, large currents will begin to flow out of the BST pin and through the bootstrap diode. The currents may be limited by the following: resistance of the BST ESD diode, resistance of the bootstrap diode, inductance of the bootstrap loop, or additional resistance purposely added in series with the bootstrap diode. If this current is too high, damage to the bootstrap diode or the LMG1210 can result. If this current delivers significant enough total charge, this can over-charge the bootstrap rail as well.

The BST pin ESD diode has been specifically designed to be robust to carry up to a couple amps surge current without damage.