SNOSD37B march   2017  – april 2023 LMG1205

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 HS Negative Voltage and Bootstrap Supply Voltage Clamping
      4. 7.3.4 Level Shift
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD Bypass Capacitor
        2. 8.2.2.2 Bootstrap Capacitor
        3. 8.2.2.3 Power Dissipation
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
      1.      Mechanical, Packaging, and Orderable Information

Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tLPHLLO turnoff propagation delayLI falling to LOL fallingTJ = 25°C33.5ns
TJ = –40°C to 125°C50
tLPLHLO turnon propagation delayLI rising to LOH risingTJ = 25°C35ns
TJ = –40°C to 125°C50
tHPHLHO turnoff propagation delayHI falling to HOL fallingTJ = 25°C33.5ns
TJ = –40°C to 125°C50
tHPLHHO turnon propagation delayHI rising to HOH risingTJ = 25°C35ns
TJ = –40°C to 125°C50
tMONDelay matching
LO on and HO off
TJ = 25°C1.5ns
TJ = –40°C to 125°C8
tMOFFDelay matching
LO off and HO on
TJ = 25°C1.5ns
TJ = –40°C to 125°C8
tHRCHO rise time (0.5 V – 4.5 V)CL = 1000 pF7ns
tLRCLO rise time (0.5 V – 4.5 V)CL = 1000 pF7ns
tHFCHO fall time (0.5 V – 4.5 V)CL = 1000 pF3.5ns
tLFCLO fall time (0.5 V – 4.5 V)CL = 1000 pF3.5ns
tPWMinimum input pulse width
that changes the output
10ns
tBSBootstrap diode
reverse recovery time
IF = 100 mA, IR = 100 mA40ns
Parameters that show only a typical value are ensured by design and may not be tested in production.
GUID-2E489CB0-9EA0-4495-B3E1-5ED114A704EF-low.gifFigure 6-1 Timing Diagram