SNOSD52B August   2018  – January 2020 TLV1805-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Reverse Current Protection Using an N-Channel MOSFET
      2.      Reverse Current & Overvoltage Protection Using P-Channel MOSFETs
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail to Rail Inputs
      2. 7.3.2 Power On Reset
      3. 7.3.3 High Power Push-Pull Output
      4. 7.3.4 Shutdown Function
      5. 7.3.5 Internal Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 External Hysteresis
        1. 7.4.1.1 Inverting Comparator With Hysteresis
        2. 7.4.1.2 Noninverting Comparator With Hysteresis
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 Reverse Current Protection Using MOSFET and TLV1805-Q1
        1. 8.2.4.1 Minimum Reverse Current
        2. 8.2.4.2 N-Channel Reverse Current Protection Circuit
          1. 8.2.4.2.1 N-Channel Oscillator Circuit
      5. 8.2.5 P-Channel Reverse Current Protection Circuit
      6. 8.2.6 P-Channel Reverse Current Protection With Overvotlage Protection
      7. 8.2.7 ORing MOSFET Controller
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.4 Shutdown Function

The TLV1805-Q1 has a logic level SHDN input. When the shutdown SHDN input is 1.4V above V-, the TLV1805-Q1 is disabled. When disabled, the output becomes high impedance (Hi-Z), and the supply current drops to below 10µA. The input bias current remains unchanged. Voltages may still be applied to the comparator inputs as long as V+ power is still applied and the applied input voltages are still within the specified input voltage range.

CAUTION

The maximum voltage on the shutdown pin is +5.5V referred to V-, regardless of supply voltage. Connect the SHDN pin to V- if shutdown is not used. Do not float the SHDN pin.

A high value pull-up or pull-down resistor on the output may be required if a specific logic level is required during shutdown (when the output is High-Z). This prevents logic inputs from floating to illegal states when the comparator output is in High-Z mode.

Since the Shutdown threshold voltage is a tested parameter, the shutdown pin can also be used as a second comparison input to provide a secondary measurment, such as overvoltage monitoring, as shown in the P-Channel Reverse Current Protection With Overvotlage Protection circuit.