SNOSD98A May   2020  – December 2020 LM7481-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump
      2. 8.3.2 Dual Gate Control (DGATE, HGATE)
        1. 8.3.2.1 Reverse Battery Protection (A, C, DGATE)
        2. 8.3.2.2 Load Disconnect Switch Control (HGATE, OUT)
      3. 8.3.3 Over Voltage Protection and Battery Voltage sensing (VSNS, SW, OV)
      4. 8.3.4 Low Iq Shutdown and Under Voltage Lockout (EN/UVLO)
    4. 8.4 Device Functional Modes
    5. 8.5 Application Examples
      1. 8.5.1 Redundant Supply OR-ing with Inrush Current Limiting, Over Voltage Protection and ON/OFF Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1  Design Requirements for 12-V Battery Protection
      2. 9.2.2  Automotive Reverse Battery Protection
      3. 9.2.3  Input Transient Protection: ISO 7637-2 Pulse 1
      4. 9.2.4  AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
      5. 9.2.5  Input Micro-Short Protection: LV124 E-10
      6. 9.2.6  Detailed Design Procedure
        1. 9.2.6.1 Design Considerations
        2. 9.2.6.2 Charge Pump Capacitance VCAP
        3. 9.2.6.3 Input and Output Capacitance
        4. 9.2.6.4 Hold-up Capacitance
        5. 9.2.6.5 Over Voltage Protection and Battery Monitor
      7. 9.2.7  MOSFET Selection: Blocking MOSFET Q1
      8. 9.2.8  MOSFET Selection: Hot-Swap MOSFET Q2
      9. 9.2.9  TVS selection
      10. 9.2.10 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

8.3.2.2 Load Disconnect Switch Control (HGATE, OUT)

HGATE and OUT comprises of Load disconnect switch control stage. Connect the Source of the external MOSFET to OUT and Gate to HGATE.

Before the HGATE driver is enabled, following conditions must be achieved:

  • The EN/UVLO pin voltage must be greater than the specified input high voltage.
  • The CAP to VS voltage must be greater than the undervoltage lockout voltage.

  • Voltage at Vs pin must be greater than Vs POR Rising thershold.

If the above conditions are not achieved, then the HGATE pin is internally connected to the OUT pin, assuring that the external MOSFET is disabled.

For Inrush Current limiting, connect CdVdT capacitor and R1 as shown in Figure 8-3.

GUID-39CD3F11-F2B4-4036-9175-A399BFD26CE1-low.gifFigure 8-3 Inrush Current Limiting

The CdVdT capacitor is required for slowing down the HGATE voltage ramp during power up for inrush current limiting. Use Equation 2 to calculate CdVdT capacitance value .

Equation 2. GUID-2C781095-5C70-464E-9C76-640D531EB868-low.gif

where IHATE_DRV is 55 μA (typ), IINRUSH is the inrush current and COUT is the output load capacitance. An extra resistor, R1, in series with the CdVdT capacitor improves the turn off time.

For Load disconnect switch only designs, configure the LM74810-Q1 as shown in Figure 8-4

GUID-C2E4C2FF-71C2-464D-AB10-ABA632A86923-low.gifFigure 8-4 Configuring LM74810-Q1 for Load Disconnect Switch Only