SNOSDB6D December   2020  – October 2024 LMP7704-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 5 V
    6. 5.6 Electrical Characteristics VS = 10 V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Radiation Hardened Performance
      2. 6.3.2 Engineering Model (Devices With /EM Suffix)
      3. 6.3.3 Diodes Between the Inputs
      4. 6.3.4 Capacitive Load
      5. 6.3.5 Input Capacitance
    4. 6.4 Device Functional Modes
      1. 6.4.1 Precision Current Source
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Low Input Voltage Noise
      2. 7.1.2 Total Noise Contribution
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.7 Typical Characteristics

at TA = 25°C, VCM = VS/2, and RL > 10 kΩ (unless otherwise noted)

LMP7704-SP Offset Voltage Distribution
 
Figure 5-1 Offset Voltage Distribution
LMP7704-SP Offset Voltage Distribution
 
Figure 5-3 Offset Voltage Distribution
LMP7704-SP Offset Voltage Distribution
 
Figure 5-5 Offset Voltage Distribution
LMP7704-SP Offset Voltage vs Temperature
 
Figure 5-7 Offset Voltage vs Temperature
LMP7704-SP Offset Voltage vs Supply Voltage
 
Figure 5-9 Offset Voltage vs Supply Voltage
LMP7704-SP Offset Voltage vs VCM
 
Figure 5-11 Offset Voltage vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-13 Input Bias Current vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-15 Input Bias Current vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-17 Input Bias Current vs VCM
LMP7704-SP PSRR vs Frequency
 
Figure 5-19 PSRR vs Frequency
LMP7704-SP Sinking Current vs Supply Voltage
 
Figure 5-21 Sinking Current vs Supply Voltage
LMP7704-SP Output Voltage vs Output Current
 
Figure 5-23 Output Voltage vs Output Current
LMP7704-SP Open-Loop Frequency Response
 
Figure 5-25 Open-Loop Frequency Response
LMP7704-SP Large Signal Step Response
 
Figure 5-27 Large Signal Step Response
LMP7704-SP Large Signal Step Response
 
Figure 5-29 Large Signal Step Response
LMP7704-SP Input Voltage Noise vs Frequency
 
Figure 5-31 Input Voltage Noise vs Frequency
LMP7704-SP Output Swing High vs Supply Voltage
 
Figure 5-33 Output Swing High vs Supply Voltage
LMP7704-SP Output Swing High vs Supply Voltage
 
Figure 5-35 Output Swing High vs Supply Voltage
LMP7704-SP THD+N vs Frequency
 
Figure 5-37 THD+N vs Frequency
LMP7704-SP Crosstalk Rejection Ratio vs Frequency (LMP7702/LMP7704)
 
Figure 5-39 Crosstalk Rejection Ratio vs Frequency (LMP7702/LMP7704)
LMP7704-SP TCVOS Distribution
 
Figure 5-2 TCVOS Distribution
LMP7704-SP TCVOS Distribution
 
Figure 5-4 TCVOS Distribution
LMP7704-SP TCVOS Distribution
 
Figure 5-6 TCVOS Distribution
LMP7704-SP CMRR vs Frequency
 
Figure 5-8 CMRR vs Frequency
LMP7704-SP Offset Voltage vs VCM
 
Figure 5-10 Offset Voltage vs VCM
LMP7704-SP Offset Voltage vs VCM
 
Figure 5-12 Offset Voltage vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-14 Input Bias Current vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-16 Input Bias Current vs VCM
LMP7704-SP Input Bias Current vs VCM
 
Figure 5-18 Input Bias Current vs VCM
LMP7704-SP Supply Current vs Supply Voltage (Per Channel)
 
Figure 5-20 Supply Current vs Supply Voltage (Per Channel)
LMP7704-SP Sourcing Current vs Supply Voltage
 
Figure 5-22 Sourcing Current vs Supply Voltage
LMP7704-SP Slew Rate vs Supply Voltage
 
Figure 5-24 Slew Rate vs Supply Voltage
LMP7704-SP Open-Loop Frequency Response
 
Figure 5-26 Open-Loop Frequency Response
LMP7704-SP Small Signal Step Response
 
Figure 5-28 Small Signal Step Response
LMP7704-SP Small Signal Step Response
 
Figure 5-30 Small Signal Step Response
LMP7704-SP Open Loop Gain vs Output Voltage Swing
 
Figure 5-32 Open Loop Gain vs Output Voltage Swing
LMP7704-SP Output Swing Low vs Supply Voltage
 
Figure 5-34 Output Swing Low vs Supply Voltage
LMP7704-SP Output Swing Low vs Supply Voltage
 
Figure 5-36 Output Swing Low vs Supply Voltage
LMP7704-SP THD+N vs Output Voltage
 
Figure 5-38 THD+N vs Output Voltage