SNOSDB6D December   2020  – October 2024 LMP7704-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 5 V
    6. 5.6 Electrical Characteristics VS = 10 V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Radiation Hardened Performance
      2. 6.3.2 Engineering Model (Devices With /EM Suffix)
      3. 6.3.3 Diodes Between the Inputs
      4. 6.3.4 Capacitive Load
      5. 6.3.5 Input Capacitance
    4. 6.4 Device Functional Modes
      1. 6.4.1 Precision Current Source
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Low Input Voltage Noise
      2. 7.1.2 Total Noise Contribution
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.1 Radiation Hardened Performance

Total Ionizing Dose (TID)—The LMP7704-SP is a radiation-hardness-assured (RHA) QML class V (QMLV) product, with a total ionizing dose (TID) level specified in the Device Information table on the front page of this data sheet. Testing and qualification of these products is done on a wafer level according to MIL-STD-883, Test Method 1019, Condition A. Radiation lot acceptance testing (RLAT) is performed at the 100krad(Si) TID level. Group E TID RLAT data are available with lot shipments as part of the QCI summary reports; see also QML Flow, Its Importance, and Obtaining Lot Information.

The LMP7704-SP was characterized for TID effects through low-dose-rate (LDR) irradiation to 150krad(Si), and high-dose-rate (HDR) irradiation to 100krad(Si). The results demonstrated the device is considered non-ELDRS to 100krad(Si); see also the LMP7704-SP Total Ionizing Dose (TID) radiation report.

Neutron Displacement Damage (NDD)—The LMP7704-SP was irradiated up to 1 × 1013 n/cm2. A sample size of 12 units was exposed to radiation testing per MILSTD-883, Method 1017 for Neutron Irradiation. All tested parameters remained within the data sheet specifications for all devices dosed. Device offset was found to increase beyond the guardbanded test limits, but remain within the data sheet specification, for one of the four units dosed to 5 × 1012 n/cm2 and for two of the four units dosed to 1 × 1013 n/cm2. More detailed results are presented in the LMP7704-SP Neutron Displacement Damage (NDD) radiation report.

Single-Event Effects (SEE)—One-time SEE characterization was performed according to EIA/JEDEC standard, EIA/JEDEC57 to linear energy transfer (LET) = 85 MeV⋅cm2/mg. During testing, no single-event latch-up (SEL) was observed. More detailed results are presented in the LMP7704-SP Single-Event Effects (SEE) radiation report.

Additional in-depth SEE investigation showed that under certain circuit conditions, a single-event transient (SET) can induce electrical overstress that damages the device. This vulnerability can apply when a supply voltage above VS = 5V is used and sufficiently high decoupling capacitance is present at the supply pin. See also Section 7.3.