SNOSDE3C July 2023 – April 2024 TPS7H6003-SP , TPS7H6013-SP , TPS7H6023-SP
PRODUCTION DATA
When configured in PWM mode, the gate drive allows for the programming of two separate dead times:
The dead time values selected are critical as these directly impact that losses that occur in the converter during these periods. The dead time is carefully chosen to avoid cross-conduction between the high-side FET and low-side FET, while also minimizing the third-quadrant conduction time for the GaN FETs. For this particular application, a dead time of approximately 25 ns was targeted for both TDLH and TDHL.
A resistor value of 30 kΩ was used for both RHL and RLH.