SNOU176B October   2020  – March 2022

PRODUCTION DATA  

  1.   Trademarks
  2. 1 General TI High Voltage Evaluation User Safety Guidelines
    1. 1.1 Safety and Precautions
  3. 2 Introduction
    1. 2.1 LMG342XEVM-04X Daughter Card
      1. 2.1.1 FAULT and OC
      2. 2.1.2 Power Pins
      3. 2.1.3 Bootstrap Mode
      4. 2.1.4 Heat Sink
    2. 2.2 Mother Boards
      1. 2.2.1 Bias Supply
      2. 2.2.2 PWM Input
      3. 2.2.3 Fault Protection
    3. 2.3 Typical Applications
    4. 2.4 Features
  4. 3  LMG342XEVM-04X Schematic
  5. 4 Mother Board Schematic
  6. 5 Recommended Footprint
  7. 6 Test Equipment
  8. 7 Test Procedure When Paired With LMG342X-BB-EVM
    1. 7.1 Setup
    2. 7.2 Start-Up and Operating Procedure
    3. 7.3 Test Results
    4. 7.4 Shutdown Procedure
    5. 7.5 Additional Operating Notes
  9. 8 Test Procedure When Paired With LMG34XX-BB-EVM
    1. 8.1 Setup
      1. 8.1.1 List of Test Points
      2. 8.1.2 List of Terminals
    2. 8.2 Start-Up and Operating Procedure
    3. 8.3 Shutdown Procedure
    4. 8.4 Additional Operation Notes
  10. 9 Bill of Materials
  11. 10Revision History

2.1.2 Power Pins

There are some high frequency decoupling capacitors on the LMG342XEVM-04X from VDC to PGND to minimize voltage overshoot during switching, but more bulk capacitance is required to hold up the DC voltage during operation. TI recommends preventing any overlap and parasitic capacitance from VSW to VDC, PGND, and any logic pins. The two ground PGND and AGND pins are functionally isolated from each other on the LMG342XEVM-04X.