SNOU180A June   2021  – September 2021 LM74701-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Setup
    1. 2.1 I/O Connector Description
    2. 2.2 Board Setup
    3. 2.3 Schematic
  4. 3LM74701-Q1EVM Performance Capture
    1. 3.1 LM74701-Q1EVM Startup
    2. 3.2 Startup Reverse Polarity (–12 V)
    3. 3.3 ISO 7637-2 Pulse 1 Performance
  5. 4EVM Board Assembly Drawings and Layout Guidelines
    1. 4.1 PCB Drawings
    2. 4.2 Bill of Materials
  6. 5Revision History

4.1 PCB Drawings

Figure 4-1 through Figure 4-4 show component placement and layout of this EVM.

GUID-20210831-SS0I-6NT1-GCTW-VW5GV4LNRMPW-low.gifFigure 4-1 LM74701-Q1EVM Top Side Placement
GUID-20210831-SS0I-W9PW-GXGV-BPV8WW427528-low.gifFigure 4-3 LM74701-Q1EVM Top Layer Routing
GUID-20210831-SS0I-3TKT-WV1B-SJCHXVNTH4CQ-low.gifFigure 4-2 LM74701-Q1EVM Bottom Side Placement
GUID-20210831-SS0I-BJDR-VW7C-NGRZHL7VCHSN-low.gifFigure 4-4 LM74701-Q1EVM Bottom Layer Routing