SNVA941A June   2020  – November 2022 LM5156 , LM5156-Q1 , LM51561 , LM51561-Q1 , LM51561H , LM51561H-Q1 , LM5156H , LM5156H-Q1

 

  1.   How to Design a Boost Converter Using the LM5156
  2. 1LM5156 Design Example
  3. 2Example Application
  4. 3Calculations and Component Selection
    1. 3.1  Switching Frequency
    2. 3.2  Inductor Calculation
    3. 3.3  Current Sense Resistor Calculation
      1. 3.3.1 Current Sense Resistor and Slope Compensation Resistor Selection
      2. 3.3.2 Current Sense Resistor Filter Calculation
    4. 3.4  Inductor Selection
    5. 3.5  Diode Selection
    6. 3.6  MOSFET Selection
    7. 3.7  Output Capacitor Selection
    8. 3.8  Input Capacitor Selection
    9. 3.9  UVLO Resistor Selection
    10. 3.10 Soft-Start Capacitor Selection.
    11. 3.11 Feedback Resistor Selection
    12. 3.12 Control Loop Compensation
      1. 3.12.1 Select the Loop Crossover Frequency (fCROSS)
      2. 3.12.2 Determine Required RCOMP
      3. 3.12.3 Determine Required CCOMP
      4. 3.12.4 Determine Required CHF
    13. 3.13 Efficiency Estimation
  5. 4Component Selection Summary
    1.     25
  6. 5Small-Signal Frequency Analysis
    1. 5.1 Boost Regulator Modulator Modeling
    2. 5.2 Compensation Modeling
    3. 5.3 Open-Loop Modeling
  7. 6Revision History

3.6 MOSFET Selection

MOSFET selection focuses on power dissipation and voltage rating. Power dissipation of MOSFET is composed of two different parts, conduction losses and switching losses. Conduction losses are dominated by the RDS(on) parameter of the MOSFET. Switching losses occur during the rise and fall time of the switch node, when the N-channel MOSFET is turning on and turning off. During the rise time and fall time, current and voltage are present in the channel of the MOSFET. The longer the rise and fall time of the switch node the higher the switching losses. Selecting a MOSFET with minimal parasitic capacitances lowers the switching losses. Ideally, conduction losses and switching losses should be approximately equal

The total gate charge (QG_total) must not be large enough to place the internal VCC regulator into current limit. The QG_total for a given MOSFET should be known. Equation 14 provides the maximum QG_total of the MOSFET.

Equation 14. GUID-5B20635D-9573-4B25-AD7C-E064963711F6-low.gif

The drain to source break down voltage rating on the MOSFET needs to be higher than the load voltage, plus some margin, due to voltage spike on the switch node. The break down voltage rating should be at least 10 V higher than VLOAD plus VF . VF is the forward voltage of the rectifying diode.

For this design, a 60-V MOSFET with low RDS(on) low threshold voltage is selected. A 60-V rating is selected to handle the maximum input voltage transient of 42 V.