SNVA998 September   2020 LP8732-Q1 , LP87522-Q1

 

  1.   Trademarks
  2. 1Design Parameters
  3. 2Power Solution
  4. 3Sequencing
    1. 3.1 Startup
    2. 3.2 Shutdown
  5. 4Schematic
  6. 5Software Drivers
  7. 6Recommended External Components
  8. 7Measurements
  9. 8Summary
  10. 9References

1 Design Parameters

Table 1-1 shows the power rails, load requirements, and startup/shutdown sequencing requirements and Section 7 shows typical measurement data.

Table 1-1 Design Parameters
VOLTAGE (V) RAIL NAME MAX LOAD (mA) SOURCE STARTUP DELAY (trigger) SHUTDOWN DELAY (trigger)
0.9V 0V9_AON 900 LP8732 BUCK0 0ms (LP8732 EN high) 0ms (LP8732 EN low)
0V9_SW 8500 LP87522 BUCK0..2 0ms (LP87522 EN1 high) 3ms (LP87522 EN1 low)
1.1 DDRV_AON 250 LP8732 BUCK1 3ms (LP8732 EN high) 0ms (LP8732 EN low)
DDRV_SW 200 LP8732 BUCK1 3ms (LP8732 EN high) 0ms (LP8732 EN low)
1.8 1V8_AON 35 LP8732 LDO0 1ms (LP8732 EN high) 2ms (LP8732 EN low)
1V8_SW 400 LP87522 BUCK3 2ms (LP87522 EN1 high) 2ms (LP87522 EN1 low)
3.3 3V3_AON 1 LP8733 LDO1 2ms (LP8732 EN high) 1ms (LP8732 EN low)
3V3_SW 300 TPS62813 4ms (LP87522 EN1 high) 0ms (LP87522 EN1 low)
IO RESET_N - LP8732 GPO 15ms (LP8732 EN high) 0ms (LP8732 EN low)
IO PWR_GOOD - LP87522 GPIO2 30ms (LP87522 EN high) 0ms (LP87522 EN low)