4 Power Loss of Multi-Rail Point-of-Load System

Many applications use multiple DC/DC converters in a point-of-load architecture. Figure 4-1 shows 7 rails using the TPS548A28 accepting external 3.3-V or 5-V V_BIAS voltages from either a seperate step-down converter or a separate power supply rail already on the circuit board. The TPS548A29 with a 4.5-V internal LDO may also be used in its place to compare the TPS548A28 power loss across different output current levels.

Using the TPS548A28 with an external 5-V bias voltage, compared to the TPS548A29 4.5-V internal LDO saves 1.03-W at 12-A. Efficiency gains are realized from the reduced power losses of the overridden internal LDOs . The power loss of each internal LDO is approximately the bias current I_VCC (20-mA) multiplied by the voltage-drop (7-V) from the 7 DC/DC converters in the multi-rail system, and the calculated value of approximately 0.98-W correlates with the measurement at 12-A. Alternatively, the TPS548A28 with an external 3.3-V bias voltage compared to the TPS548A29 4.5-V internal LDO saves only 100-mW of power. In this example, the higher gate-drive voltage of the TPS548A29 improves the MOSFET R_DS(on) conduction losses of Equation 5, compared to the TPS548A28 and external 3.3-V bias, but the internal LDO losses realized are still higher than the conduction loss savings. Table 4-1 summarizes the power loss measurements at various loads and configurations under the specified conditions. Table 4-2 shows the difference in MOSFET resistance depending on the applied gate-drive voltage. Both devices have the same integrated power stage. A higher gate-drive voltage provides lower R_DS(ON) for higher efficiency and lower power losses.

Table 4-3 compares the TPS548A28 with an internal 3-V bias volatge and an externally applied 5-V bias. At 10-A, there is a significant 1.56 W power loss savings between the TPS548A28 with a 3-V internal LDO to an externally applied 5-V bias voltage. MOSFET conduction loss savings are more prominent than the internal LDO power loss savings considering all 7 DC/DC converters together. At lower currents, the power loss improvements are less significant because conduction losses are less significant. At 1-A load, the savings from the external 5-V bias configuration saves only 30mW and at 5-A is 530mW. MOSFET gate-drive voltage and output current need to be considered when realizing power loss savings.