In a power solution using discrete regulators, the power good (PG) output of the previous regulator in the sequence can drive the enable (EN) pin of the next regulator. In this application note, the first regulator is a switching regulator that converts 12 V or 5 V into 3.3 V, for example TI hero products LMR33620 and TPS62160. A low-noise, high-PSRR LDO, such as the LP5907, converts 3.3 V into the AVDD 2.8 V rail for the image sensor. Secondary regulators are also used to convert 3.3 V into DOVDD 1.8 V and DVDD 1.2 V. DOVDD 1.8 V could be supplied by the TPS62260 or TPS62065, while a low cost LDO like the TLV702 or TPS793 supplies DVDD 1.2 V. In this solution, the power up sequence is achieved by routing PG outputs to EN inputs. However, this approach alone cannot satisfy the power down sequence requirement, which must be in the reverse order of the power up sequence.

Capacitors would need to be added control the delay in this circuit to indirectly satisfy the shutdown sequence requirement. This adds cost and size to the solution, which are both critical factors in camera module design.