SNVAA71 October   2023 TPSM63610

 

  1.   1
  2.   Using the TPSM63610/08 for Negative Output, Inverting Buck Boost Application
  3.   Trademarks
  4. 1Inverting Buck-Boost Topology
    1. 1.1 Concept
    2. 1.2 VIN and VOUT Range In Inverting Configuration
    3. 1.3 Output Current Calculations
  5. 2Design Considerations
    1. 2.1 Additional Bypass Capacitor and Schottky Diode
    2. 2.2 Start-up Behavior and Switching Node Consideration
  6. 3External Components
    1. 3.1 Capacitor Selection
    2. 3.2 System Loop Stability
    3. 3.3 UVLO
  7. 4Typical Performance
  8. 5Digital Pin Configurations
    1. 5.1 Digital Input Pin (EN)
    2. 5.2 Power-Good Pin
  9. 6Summary
  10. 7References

2.2 Start-up Behavior and Switching Node Consideration

The voltage on the SW pin switches from VIN to VOUT in an inverting topology instead of from VIN to GND in a buck topology. When the high-side MOSFET turns on, the SW node is pulled up to the input voltage. When the low-side MOSFET turns on, the SW node is pulled to -VOUT. The output voltage starts to go negative after the EN pin voltage exceeds its threshold level and VIN exceeds its UVLO threshold. As VOUT continues to go negative, the SW node tracks the negative output voltage. Figure 2-2 shows the resulting normal and smooth start-up of the output voltage.

GUID-20230927-SS0I-QKB0-LCLV-37KV9H0S6HFV-low.png Figure 2-2 Typical SW Node Characteristics During Start-Up