SNVAA84 October 2023 LMR36506
The schematic of the implemented design is shown in Figure 2-1. An adjustable version of a LMR36506 buck converter is selected for U1 due to the wide VIN range and small size of 2 mm × 2 mm. The maximum recommended 65-V input voltage supports the targeted 35-V supply and the -15-V Neg VOUT. The resulting supply voltage stress for U1 is 35 V + |-15 V| = 50 V, as outlined in the schematic.
This implementation leaves an ample margin for increasing the Neg VOUT or for transients on VIN. The Forced PWM version (LMR36506RFRPER) of the device is selected to provide the operation with a fixed frequency. This version is also selected for the best load and cross-regulation, independent of the load conditions (that is from no-load to full-load) as well as from balanced-load to completely non-symmetrical loading of the two outputs. The device allows for adjusting the switching frequency over a wide range from 200 kHz to 2.2 MHz. By connecting the RT-pin of U1 to the VCC-pin, a 1-MHz frequency is selected as a reasonable tradeoff between size and efficiency. The selected frequency enables the use of a small coupled inductor (L1) with a size of 6 mm × 6 mm. The negative output voltage (Neg VOUT) is adjusted by the output voltage divider R3, R7 (and R10) to -15 V. R10 allows the injection of a small AC signal, using the test points A and B for the purpose of loop-stability evaluation and measurement and can be replaced by a 0-Ω resistor in a final circuit. C10 is an optional feed-forward capacitor (not used in the evaluated circuit) for modifying the loop (transfer function).
The PNP BJT Q1 forms together with R1, R2, R4, and R9 to make a level shifter to generate a VIN dependent EN signal for U1, which is completely independent of the value of Neg VOUT. The complete circuit turns on for supply voltage levels of approximately 14.4 V and turns off at approximately 10.7 V, with the specific component values of this level shifter.