SNVAA87 august   2023 LMR38020

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Micro Inverter System
    2. 1.2 Typical Power Tree and Design Requirements
  5. 2Conventional Flyback Design Challenges
    1. 2.1 SSR Design Challenges
    2. 2.2 PSR Design Challenges
  6. 3New Fly-Buck Design
    1. 3.1 LMR38020 Overview
    2. 3.2 Comparison with Conventional Flyback
    3. 3.3 Design Considerations
    4. 3.4 LMR38020 Fly-Buck Design Example
  7. 4Bench Test and Result
    1. 4.1 Start Up
    2. 4.2 Typical Switching Waveforms Under Steady State
    3. 4.3 Efficiency
    4. 4.4 Load Regulation
    5. 4.5 Short Circuit
    6. 4.6 Thermal Performance
  8. 5Summary
  9. 6References

3.3 Design Considerations

Below are some tips that can be helpful to get started with a Fly-Buck™ converter design.

  • To operate as a Fly-Buck™ converter, an IC that offers Forced Pulse Width Modulation (FPWM) needs to be selected to make sure that the part can handle negative inductor current. So, in this case, the LMR38020FADDA is selected.

  • Most Buck converter devices specify the maximum output current, if a n-secondary output Fly-Buck™ converter is to be designed, the designer needs to choose a device with current rate no less than (Ipri + Nps1 × Isec1 + Nps2 × Isec2 + … + Npsn × Isecn), Npsn represents the turns ratio.

  • Most Buck converter devices have positive and negative peak current limit. Check the ipripk of Fly-Buck™ converter, both positive and negative, not to hit the peak current limit of the device.
  • A small amount of preload might be needed for isolated outputs to prevent the output voltage from rising too high under light load conditions. The amount of preload depends on the leakage, frequency, and the current flowing in the windings to some extent. Usually the preload resistor is in the orders of magnitude of 1kΩ to 10kΩ. It is also possible to use a Zener based clamp instead of a preload resistor, which avoids power loss in the preload circuit under loaded conditions.

  • The rule of thumb is keeping the duty cycle Dmax < 0.5 because larger duty cycle may reduce the time to transfer energy to the secondary side, which may lead to lower output voltage at the secondary side. However, If Dmax has to be > 0.5, monitoring the isolated output voltage regulation under Vinmin and full load and making sure it can satisfy design requirements (lower LLK and lower fsw may help to achieve larger Dmax upper limit).

  • Do not short secondary output to ground for long time if the device does not have hiccup mode for negative overcurrent protection.