SNVS358R July   2005  – June 2016 LP5900

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Output and Input Capacitor, Recommended Specifications
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 No-Load Stability
      2. 7.3.2 Enable Control
      3. 7.3.3 Low Noise Output
      4. 7.3.4 Thermal-Overload Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with Enable Control
      2. 7.4.2 Operation with Minimum Operating Input Voltage (VIN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation
        2. 8.2.2.2 External Capacitors
          1. 8.2.2.2.1 Input Capacitor
          2. 8.2.2.2.2 Output Capacitor
          3. 8.2.2.2.3 Capacitor Characteristics
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 DSBGA Mounting
    4. 10.4 DSBGA Light Sensitivity
    5. 10.5 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

10 Layout

10.1 Layout Guidelines

The device is designed to operate from an input voltage supply range between 2.5 V and 5.5 V. This input supply must be well regulated. To ensure that the LP5900 output voltage is well regulated, the input supply must be at least VOUT + 1 V.

10.2 Layout Examples

LP5900 dsbgalayout_snvs358.gif Figure 18. DSBGA Layout
LP5900 wsonlayout_snvs358.gif Figure 19. WSON Layout

10.3 DSBGA Mounting

The DSBGA package requires specific mounting techniques, which are detailed in AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009). For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the DSBGA device.

For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the DSBGA device.

10.4 DSBGA Light Sensitivity

Exposing the DSBGA device to direct light may cause incorrect operation of the device. Light sources such as halogen lamps can affect electrical performance if they are situated in proximity to the device.

Light with wavelengths in the red and infra-red part of the spectrum has the most detrimental effect; thus, the fluorescent lighting used inside most buildings has very little effect on performance.

10.5 WSON Mounting

The 6-lead WSON package requires specific mounting techniques which are detailed in AN-1187 Leadless Leadframe Package (LLP) (SNOA401). Referring to the section PCB Design Recommendations, it should be noted that the pad style which should be used with the WSON package is the NSMD (non-solder mask defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package pads to create a solder fillet to improve reliability and inspection.

The exposed thermal pad on the bottom of the WSON package must be connected to a copper area on the PCB under the package. TI recommends use of thermal vias to remove heat from the package into the PCB is recommended. Connect the thermal pad to ground potential or leave floating. Do not connect the thermal pad to any potential other than the same ground potential seen at device pin 3.