SNVS579L February   2009  – May 2018 LM26420

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      LM26420 Dual Buck DC/DC Converter
      2.      LM26420 Efficiency (Up to 93%)
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: 16-Pin WQFN
    2.     Pin Functions 20-Pin HTSSOP
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings (LM26420X/Y)
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics Per Buck
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Precision Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Overvoltage Protection
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Current Limit
      4. 7.4.4 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Programming Output Voltage
      2. 8.1.2 VINC Filtering Components
      3. 8.1.3 Using Precision Enable and Power Good
      4. 8.1.4 Overcurrent Protection
    2. 8.2 Typical Applications
      1. 8.2.1 LM26420X 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 LM26420X 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 LM26420X 2.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 LM26420Y 550 kHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
      5. 8.2.5 LM26420Y 550-kHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
        3. 8.2.5.3 Application Curves
      6. 8.2.6 LM26420Y 550-kHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.6.1 Design Requirements
        2. 8.2.6.2 Detailed Design Procedure
        3. 8.2.6.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Method 1: Silicon Junction Temperature Determination
      2. 10.3.2 Thermal Shutdown Temperature Determination
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

8.2.1.2.5 Calculating Efficiency and Junction Temperature

The complete LM26420 DC/DC converter efficiency can be estimated in the following manner.

Equation 17. LM26420 30069620.gif

Or

Equation 18. LM26420 30069622.gif

Calculations for determining the most significant power losses follow here. Other losses totaling less than 2% are not discussed.

Power loss (PLOSS) is the sum of two basic types of losses in the converter: switching and conduction. Conduction losses usually dominate at higher output loads, whereas switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D):

Equation 19. LM26420 30069610.gif

VSW_TOP is the voltage drop across the internal PFET when it is on, and is equal to:

Equation 20. VSW_TOP = IOUT × RDSON_TOP

VSW_BOT is the voltage drop across the internal NFET when it is on, and is equal to:

Equation 21. VSW_BOT = IOUT × RDSON_BOT

If the voltage drop across the inductor (VDCR) is accounted for, the equation becomes: 

Equation 22. LM26420 30069621.gif

Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to:

Equation 23. PIND = IOUT2 × RDCR

The LM26420 conduction loss is mainly associated with the two internal FETs:

Equation 24. LM26420 30069672.gif

If the inductor ripple current is fairly small, the conduction losses can be simplified to:

Equation 25. PCOND_TOP = (IOUT2 × RDSON_TOP × D)
Equation 26. PCOND_BOT = (IOUT2 × RDSON_BOT × (1-D))
Equation 27. PCOND = PCOND_TOP + PCOND_BOT

Switching losses are also associated with the internal FETs. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node.

Switching Power Loss is calculated as follows:

Equation 28. PSWR = 1/2(VIN × IOUT × FSW × TRISE)
Equation 29. PSWF = 1/2(VIN × IOUT × FSW × TFALL)
Equation 30. PSW = PSWR + PSWF

Another loss is the power required for operation of the internal circuitry:

Equation 31. PQ = IQ × VIN

IQ is the quiescent operating current, and is typically around 8.4 mA (IQVINC = 4.7 mA + IQVIND = 3.7 mA) for the 550-kHz frequency option.

Due to Dead-Time-Control Logic in the converter, there is a small delay (~4 nsec) between the turn ON and OFF of the TOP and BOTTOM FET. During this time, the body diode of the BOTTOM FET is conducting with a voltage drop of VBDIODE (~0.65 V). This allows the inductor current to circulate to the output, until the BOTTOM FET is turned ON and the inductor current passes through the FET. There is a small amount of power loss due to this body diode conducting and it can be calculated as follows:

Equation 32. PBDIODE = 2 × (VBDIODE × IOUT × FSW × TBDIODE)

Typical Application power losses are:

Equation 33. PLOSS = ΣPCOND + PSW + PBDIODE + PIND + PQ
Equation 34. PINTERNAL = ΣPCOND + PSW+ PBDIODE + PQ

Table 3. Power Loss Tabulation

DESIGN PARAMETER VALUE DESIGN PARAMETER VALUE
VIN 5 V VOUT 1.2 V
IOUT 2 A POUT 2.4 W
FSW 550 kHz
VBDIODE 0.65 V PBDIODE 5.7 mW
IQ 8.4 mA PQ 42 mW
TRISE 1.5 nsec PSWR 4.1 mW
TFALL 1.5 nsec PSWF 4.1 mW
RDSON_TOP 75 mΩ PCOND_TOP 81 mW
RDSON_BOT 55 mΩ PCOND_BOT 167 mW
INDDCR 20 mΩ PIND 80 mW
D 0.262 PLOSS 384 mW
η 86.2% PINTERNAL 304 mW

These calculations assume a junction temperature of 25°C. The RDSON values are larger due to internal heating; therefore, the internal power loss (PINTERNAL) must be first calculated to estimate the rise in junction temperature.