PCB layout is a critical for good power supply
design. There are several paths that conduct high slew-rate currents or voltages
that can interact with stray inductance or parasitic capacitance to generate noise
and EMI or degrade the power supply performance.
- Bypass the VIN pin to GND with a low-ESR ceramic capacitor of X5R or X7R dielectric. Place CIN as close as possible to the LM5165 VIN and GND pins. Ground return paths for both the input and output capacitors must consist of localized top-side planes that connect to the GND pin and exposed PAD.
- Minimize the loop area formed by the input capacitor connections and the VIN and GND pins.
- Locate the power inductor close to the SW pin. Minimize the area of the SW trace or plane to prevent excessive capacitive coupling.
- Tie the GND pin directly to the power pad under the device and to a heat-sinking PCB ground plane.
- Use a ground plane in one of the middle layers as a noise shielding and heat dissipation path.
- Have a single-point ground connection to the plane. Route the ground connections for the feedback, soft-start, and enable components to the ground plane. This prevents any switched or load currents from flowing in analog ground traces. If not properly handled, poor grounding results in degraded load regulation or erratic output voltage ripple behavior.
- Make VIN, VOUT and ground bus connections as wide as possible. This reduces any voltage drops on the input or output paths of the converter and maximizes efficiency.
- Minimize trace length to the FB pin. Locate both feedback resistors close to the FB pin. Place CFF (if used) directly in parallel with RFB1. Route the VOUT sense path away from noisy nodes and preferably on a layer at the other side of a shielding layer.
- Locate the components at RT and SS as close as possible to the device. Route with minimal trace lengths.
- Provide adequate heatsinking for the LM5165 to keep the junction temperature below 150°C. For operation at full rated load, the top-side ground plane is an important heat-dissipating area. Use an array of heat-sinking vias to connect the exposed PAD to the PCB ground plane. If the PCB has multiple copper layers, connect these thermal vias to inner-layer ground planes.