SNVSAE9D January   2016  – May 2017 TPS61194-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Internal LDO Electrical Characteristics
    7. 7.7  Protection Electrical Characteristics
    8. 7.8  Current Sinks Electrical Characteristics
    9. 7.9  PWM Brightness Control Electrical Characteristics
    10. 7.10 Boost and SEPIC Converter Characteristics
    11. 7.11 Logic Interface Characteristics
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Integrated DC-DC Converter
      2. 8.3.2 Internal LDO
      3. 8.3.3 LED Current Sinks
        1. 8.3.3.1 Output Configuration
        2. 8.3.3.2 Current Setting
        3. 8.3.3.3 Brightness Control
      4. 8.3.4 Protection and Fault Detections
        1. 8.3.4.1 Adaptive DC-DC Voltage Control and Functionality of LED Fault Comparators
        2. 8.3.4.2 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device States
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application for 4 LED Strings
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 LDO Output Capacitor
          5. 9.2.1.2.5 Diode
        3. 9.2.1.3 Application Curves
      2. 9.2.2 SEPIC Mode Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Inductor
          2. 9.2.2.2.2 Diode
          3. 9.2.2.2.3 Capacitor C1
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

8 Detailed Description

8.1 Overview

The TPS61194-Q1 is a highly integrated LED driver for automotive infotainment, lighting system and medium-sized LCD backlight applications. It includes a DC-DC with an integrated FET, supporting both boost and SEPIC modes, an internal LDO enabling direct connection to battery without need for a pre-regulated supply and four LED current sinks. The VDDIO/EN pin provides the supply voltage for digital IOs (PWM and SYNC inputs) and at the same time enables the device.

The switching frequency on the DC-DC converter is set by a resistor connected to the FSET pin. The maximum voltage of the DC-DC is set by a resistive divider connected to the FB pin. For the best efficiency the output voltage is adapted automatically to the minimum necessary level needed to drive the LED strings. This is done by monitoring LED output voltage drop in real time. For EMI reduction and control two optional features are available:

  • Spread spectrum, which reduces EMI noise around the switching frequency and its harmonic frequencies
  • DC-DC can be synchronized to an external frequency connected to SYNC pin

The four constant current outputs OUT1, OUT2, OUT3, and OUT4 provide LED current up to 100 mA.Value for the current per OUT pin is set with a resistor connected to ISET pin. Current sinks that are not used must be connected to ground. Grounded current sink is disabled and excluded from adaptive voltage detection loop.

Brightness is controlled with the PWM input. Frequency range for the input PWM is from 100 Hz to 20 kHz. LED output PWM follows the input PWM so the output frequency is equal to the input frequency.

TPS61194-Q1 has extensive fault detection features :

  • Open-string and shorted LED detections
    • LED fault detection prevents system overheating in case of open or short in some of the LED strings
  • VIN input overvoltage protection
    • Threshold sensing from VIN pin
  • VIN input undervoltage protection
    • Threshold sensing from VIN pin
  • Thermal shutdown in case of die overtemperature

Fault condition is indicated through the FAULT output pin.

8.2 Functional Block Diagram

TPS61194-Q1 block_diagr_SNVSAE9.gif

8.3 Feature Description

8.3.1 Integrated DC-DC Converter

The TPS61194-Q1 DC-DC converter generates supply voltage for the LEDs and can operate in boost mode or in SEPIC mode. The maximum output voltage VOUT_MAX is defined by an external resistive divider (R1, R2).

VOUT_MAX voltage should be chosen based on the maximum voltage required for LED strings. Recommended maximum voltage is about 30% higher than maximum LED string voltage. DC-DC output voltage is adjusted automatically based on LED current sink headroom voltage. Maximum, minimum, and initial boost voltages can be calculated with Equation 1:

Equation 1. TPS61194-Q1 formula_boost_max_volt_SNVSA50.gif

where

  • VBG = 1.2 V
  • R2 recommended value is 130 kΩ
  • Resistor values are in kΩ
  • K = 1 for maximum adaptive boost voltage (typical)
  • K = 0 for minimum adaptive boost voltage (typical)
  • K = 0.88 for initial boost voltage (typical)
TPS61194-Q1 C008_SNVSA50.png Figure 9. Maximum Converter Output Voltage vs R1 Resistance

Alternatively, a T-divider can be used if resistance less than 100 kΩ is required for the external resistive divider. Refer to Using the TPS61194-Q1 Evaluation Module for details.

The converter is a current mode DC-DC converter, where the inductor current is measured and controlled with the feedback. Switching frequency is adjustable between 250 kHz and 2.2 MHz with RFSET resistor as Equation 2:

Equation 2. ƒSW = 67600 / (RFSET + 6.4)

where

  • ƒSW is switching frequency, kHz
  • RFSET is frequency setting resistor, kΩ

In most cases lower frequency has higher system efficiency. DC-DC internal parameters are chosen automatically according to the selected switching frequency (see Table 2) to ensure stability. In boost mode a 15-pF capacitor CFB must be placed across resistor R1 when operating in 300-kHz to 500-kHz range (see Typical Application for 4 LED Strings). When operating in the 1.8-MHz to 2.2-MHz range CFB = 4.7 pF.

TPS61194-Q1 boost_diagr_SNVSAC7.gif Figure 10. Boost Block Diagram

DC-DC can be driven by an external SYNC signal between 300 kHz and 2.2 MHz. If the external synchronization input disappears, DC-DC continues operation at the frequency defined by RFSET resistor. When external frequency disappears and SYNC pin level is low, converter continues operation without spread spectrum immediately. If SYNC remains high, converter continues switching with spread spectrum enabled after 256 µs.

External SYNC frequency must be 1.2 to 1.5 times higher than the frequency defined by RFSET resistor. Minimum frequency setting with RFSET is 250 kHz to support 300-kHz switching with external clock.

The optional spread spectrum feature (±3% from central frequency, 1-kHz modulation frequency) reduces EMI noise at the switching frequency and its harmonic frequencies. When external synchronization is used, spread spectrum is not available.

Table 1. DC-DC Synchronization Mode

SYNC PIN INPUT MODE
Low Spread spectrum disabled
High Spread spectrum enabled
300 to 2200 kHz frequency Spread spectrum disabled, external synchronization mode

Table 2. DC-DC Parameters(1)

RANGE FREQUENCY (kHz) TYPICAL
INDUCTANCE (µH) 		TYPICAL BOOST INPUT
AND OUTPUT CAPACITORS (µF) 		MINIMUM SWITCH
OFF TIME (ns)(2)		 BLANK
TIME (ns) 		CURRENT
RAMP (A/s)		 CURRENT RAMP
DELAY (ns)
1 300 to 480 33 2 ×10 (cer.) + 33 (electr.) 150 95 24 550
2 480 to 1150 15 10 (cer.) + 33 (electr.) 60 95 43 300
3 1150 to 1650 10 3 × 10 (cer.) 40 95 79 0
4 1650 to 2200 4.7 3 × 10 (cer.) 40 70 145 0
(1) Parameters are for reference only
(2) Due to current sensing comparator delay the actual minimum off time is 6 ns (typical) longer than in the table.

The converter SW pin DC current is limited to 2 A (typical). To support warm-start transient condition the current limit is automatically increased to 2.5 A for a short period of 1.5 seconds when a 2-A limit is reached.

NOTE

Application condition where the 2-A limit is exceeded continuously is not allowed. In this case the current limit would be 2 A for 1.5 seconds followed by 2.5-A limit for 1.5 seconds, and this 3-second period repeats.

To keep switching voltage within safe levels there is a 48-V limit comparator in the event that FB loop is broken.

8.3.2 Internal LDO

The internal LDO regulator converts the input voltage at VIN to a 4.3-V output voltage for internal use. Connect a minimum of 1-µF ceramic capacitor from LDO pin to ground, as close to the LDO pin as possible.

8.3.3 LED Current Sinks

8.3.3.1 Output Configuration

TPS61194-Q1 detects LED output configuration during start-up. Any current sink output connected to ground is disabled and excluded from the adaptive voltage control of the DC-DC and fault detections.

8.3.3.2 Current Setting

Maximum current for the LED outputs is controlled with external RISET resistor. RISET value for target maximum current can be calculated using Equation 3:

Equation 3. TPS61194-Q1 form_current_SNVSA50.gif

where

  • RISET is current setting resistor, kΩ
  • ILED is output current per output, mA

8.3.3.3 Brightness Control

TPS61194-Q1 controls the brightness of the display with conventional PWM. Output PWM directly follows the input PWM. Input PWM frequency can be in the range of 100 Hz to 20 kHz.

8.3.4 Protection and Fault Detections

The TPS61194-Q1 has fault detection for LED open and short, VIN input overvoltage protection (VIN_OVP) , VIN undervoltage lockout (VIN_UVLO), and thermal shutdown (TSD).

8.3.4.1 Adaptive DC-DC Voltage Control and Functionality of LED Fault Comparators

Adaptive voltage control function adjusts the DC-DC output voltage to the minimum sufficient voltage for proper LED current sink operation. The current sink with highest VF LED string is detected and DC-DC output voltage adjusted accordingly. DC-DC adaptive control voltage step size is defined by maximum voltage setting, VSTEP = (VOUT_MAX – VOUT_MIN) / 256. Periodic down pressure is applied to the target voltage to achieve better system efficiency.

Every LED current sink has 3 comparators for the adaptive DC-DC control and LED fault detections. Comparator outputs are filtered, filtering time is 1 µs.

TPS61194-Q1 compar_SNVSA50.gif Figure 11. Comparators for Adaptive Voltage Control and LED Fault Detection

Figure 12 shows different cases which cause DC-DC voltage increase, decrease, or generate faults. In normal operation voltage at all the OUT# pins is between LOW_COMP and MID_COMP levels, and boost voltage stays constant. LOW_COMP level is the minimum for proper LED current sink operation, 1.1 × VSAT + 0.2 V (typical). MID_COMP level is 1.1 × VSAT + 1.2 V (typical) so typical headroom window is 1 V.

When voltage at all the OUT# pins increases above MID_COMP level, DC-DC voltage adapts downwards.

When voltage at any of the OUT# pins falls below LOW_COMP threshold, DC-DC voltage adapts upwards. In the condition where DC-DC voltage reaches the maximum and there are one or more outputs still below LOW_COMP level, an open LED fault is detected.

HIGH_COMP level, 6 V typical, is the threshold for shorted LED detection. When the voltage of one or more of the OUT# pins increases above HIGH_COMP level and at least one of the other outputs is within the normal headroom window, shorted LED fault is detected.

TPS61194-Q1 algor_protect_SNVSAE9.gif Figure 12. Protection and DC-DC Voltage Adaptation Algorithms

8.3.4.2 Overview of the Fault/Protection Schemes

A summary of the TPS61194-Q1fault detection behavior is shown in Table 3. Detected faults (excluding LED open or short) cause device to enter FAULT_RECOVERY state. In FAULT_RECOVERY the DC-DC and LED current sinks of the device are disabled, and the FAULT pin is pulled low. The device recovers automatically and enters normal operating mode (ACTIVE) after a recovery time of 100 ms if the fault condition has disappeared. When recovery is succesful, FAULT pin is released.

If a LED fault is detected, the device continues normal operation and only the faulty string is disabled. The fault is indicated via the FAULT pin which can be released by toggling VDDIO/EN pin low for a short period of 2 µs to 20 µs. LEDs are turned off for this period but the device stays in ACTIVE mode. If VDDIO/EN is low longer, the device goes to STANDBY and restarts when EN goes high again.

Table 3. Fault Detections

FAULT/
PROTECTION 		FAULT NAME THRESHOLD FAULT PIN FAULT_
RECOVERY
STATE		 ACTION
VIN overvoltage protection VIN_OVP 1. VIN > 42 V
2. VOUT > VSET_DCDC + 6..10 V.
VSET_DCDC is voltage value defined by logic during adaptation 		Yes Yes 1. Overvoltage is monitored from the beginning of soft start. Fault is detected if the duration of overvoltage condition is 100 µs minimum.
2. Overvoltage is monitored from the beginning of normal operation (ACTIVE mode). Fault is detected if over-voltage condition duration is 560 ms minimum (tfilter). After the first fault, detection filter time is reduced to 50 ms for following recovery cycles. When the device recovers and has been in ACTIVE mode for 160 ms, filter time is increased back to 560 ms .
VIN undervoltage lockout VIN_UVLO Falling 3.9 V
Rising 4 V 		Yes Yes Detects undervoltage condition at VIN pin. Sensed in all operating modes. Fault is detected if undervoltage condition duration is 100 µs minimum.
Open LED fault OPEN_LED LOW_COMP threshold Yes No Detected if the voltage of one or more current sinks is below threshold level, and DC-DC adaptive control has reached maximum voltage. Open string is removed from the DC-DC voltage control loop and current sink is disabled.
Fault pin is released by toggling VDDIO/EN pin. If VDDIO/EN is low for a period of 2 µs to 20 µs, LEDs are turned off for this period but device stays ACTIVE. If VDDIO/EN is low longer, device goes to STANDBY and restarts when EN goes high again.
Shorted LED fault SHORT_LED Shorted string detection level 6 V Yes No Detected if the voltage of one or more current sinks is above shorted string detection level and at least one OUTx voltage is within headroom window. Shorted string is removed from the DC-DC voltage control loop and current sink is disabled.
Fault pin is released by toggling VDDIO/EN pin. If VDDIO/EN is low for a period of 2…20 µs, LEDs are turned off for this period but device stays ACTIVE. If VDDIO/EN is low longer, device goes to STANDBY and restarts when EN goes high again..
Thermal protection TSD 165ºC
Thermal shutdown hysteresis 20ºC 		Yes Yes Thermal shutdown is monitored from the beginning of soft start. Die temperature must decrease by 20ºC for device to recover.
TPS61194-Q1 boost_OVP_SNVSAC7.gif Figure 13. VIN Overvoltage Protection (DC-DC OVP)
TPS61194-Q1 VIN_OVP_SNVSAC7.gif Figure 14. VIN Overvoltage Protection (VIN OVP)
TPS61194-Q1 VIN_UVLO_SNVSAC7.gif Figure 15. VIN Undervoltage Lockout
TPS61194-Q1 LED_open_fault_SNVSAC7.gif Figure 16. LED Open Fault
TPS61194-Q1 LED_short_fault_SNVSAC7.gif Figure 17. LED Short Fault

8.4 Device Functional Modes

8.4.1 Device States

The TPS61194-Q1 enters STANDBY mode when the internal LDO output rises above the power-on reset level, VLDO > VPOR. In STANDBY mode the device is able to detect VDDIO/EN signal. When VDDIO/EN is pulled high, the device powers up. After start LED outputs are sensed to detect grounded outputs. Grounded outputs are disabled and excluded from the adaptive voltage control loop of the DC-DC.

If a fault condition is detected, the device enters FAULT_RECOVERY state. Faults that cause the device to enter FAULT_RECOVERY are listed in Table 3. When LED open or short is detected, the faulty string is disabled, but device stays in ACTIVE mode.

TPS61194-Q1 state_diagr_SNVSAC7.gif Figure 18. State Diagram
TPS61194-Q1 start_up_SNVSAC7.gif Figure 19. Timing Diagram for the Typical Start-Up and Shutdown