SNVSAY4F august   2018  – august 2023 LM5155-Q1 , LM51551-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Device Comparison Table
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Line Undervoltage Lockout (UVLO/SYNC Pin)
      2. 9.3.2  High Voltage VCC Regulator (BIAS, VCC Pin)
      3. 9.3.3  Soft Start (SS Pin)
      4. 9.3.4  Switching Frequency (RT Pin)
      5. 9.3.5  Clock Synchronization (UVLO/SYNC Pin)
      6. 9.3.6  Current Sense and Slope Compensation (CS Pin)
      7. 9.3.7  Current Limit and Minimum On-time (CS Pin)
      8. 9.3.8  Feedback and Error Amplifier (FB, COMP Pin)
      9. 9.3.9  Power-Good Indicator (PGOOD Pin)
      10. 9.3.10 Hiccup Mode Overload Protection (LM51551 Only)
      11. 9.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
      12. 9.3.12 MOSFET Driver (GATE Pin)
      13. 9.3.13 Overvoltage Protection (OVP)
      14. 9.3.14 Thermal Shutdown (TSD)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Run Mode
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Custom Design With WEBENCH® Tools
        2. 10.2.2.2 Recommended Components
        3. 10.2.2.3 Inductor Selection (LM)
        4. 10.2.2.4 Output Capacitor (COUT)
        5. 10.2.2.5 Input Capacitor
        6. 10.2.2.6 MOSFET Selection
        7. 10.2.2.7 Diode Selection
        8. 10.2.2.8 Efficiency Estimation
      3. 10.2.3 Application Curve
    3. 10.3 System Examples
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  15. 14Mechanical, Packaging, and Orderable Information

9.1 Overview

The LM5155x-Q1 device is a wide input range, non-synchronous boost controller that uses peak-current-mode control. The device can be used in boost, SEPIC, and flyback topologies.

The LM5155x-Q1 device can start up from a 1-cell battery with a minimum of 2.97 V if the BIAS pin is connected to the VCC pin. It can operate with the input supply voltage as low as 1.5 V if the BIAS pin is greater than 3.5 V. The internal VCC regulator also supports BIAS pin operation up to 45 V (50-V absolute maximum) for automotive load dump. The switching frequency is dynamically programmable with an external resistor from 100 kHz to 2.2 MHz. Switching at 2.2 MHz minimizes AM band interference and allows for a small solution size and fast transient response.

The device features a 1.5-A standard MOSFET driver and a low 100-mV current limit threshold. The device also supports the use of an external VCC supply to improve efficiency. Low operating current and pulse skipping operation improve efficiency at light loads.

The device has built-in protection features such as cycle-by-cycle current limit, overvoltage protection, line UVLO, and thermal shutdown. Hiccup mode overload protection is available in the LM51551-Q1 device option. Additional features include low shutdown IQ, programmable soft start, programmable slope compensation, precision reference, power good indicator, and external clock synchronization.