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TPS38800-Q1/TPS388R0-Q1 Multichannel Overvoltage and Undervoltage I2C Programmable Voltage Supervisor
SNVSCB5A
March 2022 – December 2024
TPS388R0-Q1
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TPS38800-Q1/TPS388R0-Q1 Multichannel Overvoltage and Undervoltage I2C Programmable Voltage Supervisor
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
I2C
7.3.2
Auto Mask (AMSK)
7.3.3
PEC
7.3.4
VDD
7.3.5
MON
7.3.6
NIRQ
7.3.7
NRST
7.4
Device Functional Modes
7.4.1
Built-In Self Test and Configuration Load
7.4.1.1
Notes on BIST Execution
7.4.2
TPS38800-Q1 Power ON
7.4.3
General Monitoring
7.4.3.1
IDLE Monitoring
7.4.3.2
ACTIVE Monitoring
7.4.3.3
Sequence Monitoring 1
7.4.3.3.1
ACT Transitions 0→1
7.4.3.3.2
SLEEP Transition 1→0
7.4.3.3.3
SLEEP Transition 0→1
7.4.3.4
Sequence Monitoring 2
7.4.3.4.1
ACT Transition 1→0
7.5
Register Maps
7.5.1
Registers Overview
7.5.1.1
BANK0 Registers
7.5.1.2
BANK1 Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Automotive Multichannel Sequencer and Monitor
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.4
Application Curves
9
Power Supply Recommendations
9.1
Power Supply Guidelines
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Nomenclature
11.2
Documentation Support
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
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Data Sheet
TPS38800-Q1/TPS388R0-Q1 Multichannel Overvoltage and Undervoltage I
2
C Programmable Voltage Supervisor
1
Features
ASIL-B Functional Safety-Compliant product
Development target for Functional Safety applications
Documentation to aid ISO 26262 system design
Systematic capability up to ASIL D
Hardware capability up to ASIL B
AEC-Q100 qualified with the following results:
Device temperature grade 1: –40°C to +125°C
Monitor state-of-the art SOCs
± 6mV threshold accuracy (–40°C to +125°C)
Input voltage range: 2.5V to 5.5V
Undervoltage lockout (UVLO): 2.48V
Low quiescent current (maximum): 200µA in idle mode
Configuration of 2 to 8 channels available
Fixed window threshold levels
5mV steps from 0.2V to 1.475V
20mV steps from 0.8V to 5.5V
Miniature package and minimal component cost
3mm x 3mm QFN package
User adjustable glitch immunity via I
2
C
User adjustable voltage threshold levels via I
2
C
Designed for safety applications
Active-low open-drain NIRQ output (Latched)
Active-low open-drain NRST output (Reset Delay)
Cyclic Redundancy Checking (CRC)
Packet Error Checking (PEC)
2
Applications
Advanced driver assistance system (ADAS)
Sensor fusion
