SNVSCL9A March 2011 – October 2024 LM3481-Q1
PRODUCTION DATA
The drive pin, DR, of the LM3481-Q1 must be connected to the gate of an external MOSFET. In a boost topology, the drain of the external N-Channel MOSFET is connected to the inductor and the source is connected to the ground. The drive pin voltage, VDR, depends on the input voltage (see Section 5.6). In most applications, a logic level MOSFET can be used. For very low input voltages, a sub-logic level MOSFET should be used.
The selected MOSFET directly controls the efficiency. The critical parameters for selection of a MOSFET are:
The off-state voltage of the MOSFET is approximately equal to the output voltage. VDS(MAX) of the MOSFET must be greater than the output voltage. The power losses in the MOSFET can be categorized into conduction losses and ac switching or transition losses. RDS(ON) is needed to estimate the conduction losses. The conduction loss, PCOND, is the I2R loss across the MOSFET. The maximum conduction loss is given by:
where DMAX is the maximum duty cycle.
At high switching frequencies the switching losses may be the largest portion of the total losses.
The switching losses are very difficult to calculate due to changing parasitics of a given MOSFET in operation. Often, the individual MOSFET datasheet does not give enough information to yield a useful result. Equation 38 and Equation 39 give a rough idea how the switching losses are calculated: