SNVU658B March   2020  – May 2021 TPS54J060 , TPS54J061

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Frequency and Operation Mode Setting
      3. 1.3.3 Enable Pin Selection
      4. 1.3.4 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Start Up Procedure
    3. 2.3  Efficiency
    4. 2.4  Load and Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up and Down with EN
    10. 2.10 Powering Up and Down With VIN
    11. 2.11 Start-Up Into Pre-Bias
    12. 2.12 Current Limit
  4. 3Schematic, List of Materials, and Layout
    1. 3.1 Schematic
    2. 3.2 List of Materials
    3. 3.3 Layout
  5.   Revision History

2.8 Input Voltage Ripple

Figure 2-18, Figure 2-19, and Figure 2-20 show the TPS54J060EVM-067 and TPS54J061EVM-067 input voltage ripple for VIN = 12 V. The ripple voltage is measured directly across the ceramic input capacitor closest to the input terminal.

GUID-E4BAFE4D-A0C4-4E0F-96C4-9564E892BE47-low.gifFigure 2-18 Input Ripple – FCCM, 0.1-A Load
GUID-B343F114-CDE9-4865-9EA7-D2608830CB73-low.gifFigure 2-20 Input Ripple – DCM, 0.1-A Load
GUID-7210EB14-1A21-4853-B38E-17CFD933EAEB-low.gifFigure 2-19 Input Ripple – FCCM, 6-A Load