SNVU755A January 2021 – June 2021 TLV841
The TLV841M device variant option offers a Manual Reset (MR) pin that is utilized via jumper J8 (short pin 1 [MR] to pin 2 [GND]). If a shunt jumper is placed on jumper J8, the RESET pin is asserted and forced into a low state. After the shunt jumper is removed and VDD is above its reset threshold, MR returns to a logic high due to the internal pull-up resistor, and RESET is de-asserted to a logic high after the user-defined delay expires. If jumper J8 is left floating, the device operates normally as the MR pin defaults to a logic high via internal pull-up resistor. Pin 1 of jumper J8 can also be connected to a control signal to set the logic level on MR pin. If pin 1 on jumper J8 is a logic low, the device asserts a reset. There is also test point TP3 connected directly to the MR pin in case the user wants to monitor the MR pin.