The TPS3704Q1EVM comes populated with the TPS37044A7OHDDFRQ1 device variant which has an open-drain, active-low output topology for the RESET1 and RESET2 pins. The other device variants provide different number of RESET output pins and can be used on this EVM. The TPS3704Q1EVM provides test points TP5 and TP6 that are connected directly to the RESET1 and RESET2 pins, respectively, for monitoring and/or interfacing to other devices.

For TPS37044-Q1 RESET1 asserts when either SENSE1 or SENSE2 voltages fall outside of the overvoltage or undervoltage window threshold. RESET1 stays asserted for the reset timeout period after both SENSE1 and SENSE2 voltages fall back within the window threshold. This is shown in Figure 4-6.

For all other device options, RESET1 asserts when the voltage on SENSE1 falls outside of the overvoltage or undervoltage threshold window. RESET1 stays asserted for the reset timeout period after SENSE1 voltage falls back within the window threshold.

For TPS37044-Q1 RESET2 asserts when either SENSE3 or SENSE4 fall outside of the aformentioned window threshold. RESET2 stays asserted for the reset timeout period after both SENSE3 and SENSE4 voltages fall back within the window threshold. This is shown in Figure 4-7.

For the two channel and three channel device options (TPS37042-Q1 and TPS37043-Q1 respectively) RESET2 asserts when the voltage on SENSE2 falls outside of the overvoltage or undervoltage threshold window. RESET2 stays asserted for the reset timeout period after SENSE2 voltage falls back within the window threshold.