SNVU859 June   2024 LP5813

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documentation
    5.     Support Resources
    6.     Trademarks
  3. 1Introduction/Feature Overview
    1. 1.1 Overview
  4. 2 Register Maps
    1. 2.1  Register Map Table
    2. 2.2  Device_Enable Registers
    3. 2.3  Config Registers
    4. 2.4  Command Registers
    5. 2.5  LED_Enable Registers
    6. 2.6  Fault_Clear Registers
    7. 2.7  Reset Registers
    8. 2.8  Manual_DC Registers
    9. 2.9  Manual_PWM Registers
    10. 2.10 Autonomous_DC Registers
    11. 2.11 LED_0_Autonomous_Animation Registers
    12. 2.12 LED_1_Autonomous_Animation Registers
    13. 2.13 LED_2_Autonomous_Animation Registers
    14. 2.14 LED_3_Autonomous_Animation Registers
    15. 2.15 LED_A0_Autonomous_Animation Registers
    16. 2.16 LED_A1_Autonomous_Animation Registers
    17. 2.17 LED_A2_Autonomous_Animation Registers
    18. 2.18 LED_B0_Autonomous_Animation Registers
    19. 2.19 LED_B1_Autonomous_Animation Registers
    20. 2.20 LED_B2_Autonomous_Animation Registers
    21. 2.21 LED_C0_Autonomous_Animation Registers
    22. 2.22 LED_C1_Autonomous_Animation Registers
    23. 2.23 LED_C2_Autonomous_Animation Registers
    24. 2.24 LED_D0_Autonomous_Animation Registers
    25. 2.25 LED_D1_Autonomous_Animation Registers
    26. 2.26 LED_D2_Autonomous_Animation Registers
    27. 2.27 Flag Registers
  5.   Revision History

2.2 Device_Enable Registers

Table 2-2 lists the memory-mapped registers for the Device_Enable registers. All register offset addresses not listed in Table 2-2 should be considered as reserved locations and the register contents should not be modified.

Table 2-2 DEVICE_ENABLE Registers
AddressAcronymRegister NameSection
0hChip_ENEnable the internal circuitsGo

2.2.1 Chip_EN Register (Address = 0h) [Reset = 00h]

Chip_EN is shown in Figure 2-1 and described in Table 2-3.

Return to the Summary Table.

Figure 2-1 Chip_EN Register
76543210
RESERVEDchip_en
R/W-0hR/W-0h
Table 2-3 Chip_EN Register Field Descriptions
BitFieldTypeResetDescription
7-1RESERVEDR/W0h Reserved
0chip_enR/W0h Enable the internal circuits
0h = Disable
1h = Enable