SNVU859 User guide

SNVU859 June 2024 LP5813

2.3 Config Registers

Table 2-4 lists the memory-mapped registers for the Config registers. All register offset addresses not listed in Table 2-4 should be considered as reserved locations and the register contents should not be modified.

Table 2-4 CONFIG Registers

Address	Acronym	Register Name	Section
1h	Dev_Config_0	Device configuration register 0, including max current sinks current and boost output voltage settings	Go
2h	Dev_Config_1	Device configuration register 1, including LED configuration and PWM frequency settings	Go
3h	Dev_Config_2	Device configuration register 2, including scan order settings	Go
4h	Dev_Config_3	Device configuration register 3, including autonomous enable settings for LED_0 to LED_3, LED_A0 to LEDA2 and LED_B0	Go
5h	Dev_Config_4	Device configuration register 4, including autonomous enable settings for LED_B1 to LED_B2, LED_C0 to LEDC2 and LED_D0 to LED_D2	Go
6h	Dev_Config_5	Device configuration register 5, including exponential curve enable settings for LED_0 to LED_3, LED_A0 to LEDA2 and LED_B0	Go
7h	Dev_Config_6	Device configuration register 6, including exponential curve enable settings for LED_B1 to LED_B2, LED_C0 to LEDC2 and LED_D0 to LED_D2	Go
8h	Dev_Config_7	Device configuration register 7, including phase shiftt settings for LED_0 to LED_3	Go
9h	Dev_Config_8	Device configuration register 8, including phase shiftt settings for LED_A0 to LED_A2 and LED_B0	Go
Ah	Dev_Config_9	Device configuration register 9, including phase shiftt settings for LED_B1 to LED_B2 and LED_C0 to LED_C1	Go
Bh	Dev_Config_10	Device configuration register 10, including phase shiftt settings for LED_C2 and LED_D0 to LED_D2	Go
Ch	Dev_Config_11	Device configuration register 11, including line change time and VSYNC settings	Go
Dh	Dev_Config_12	Device configuration register 12, including threshold and action settings for LOD, LSD and clamp	Go

2.3.1 Dev_Config_0 Register (Address = 1h) [Reset = 00h]

Dev_Config_0 is shown in Figure 2-2 and described in Table 2-5.

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Figure 2-2 Dev_Config_0 Register

7	6	5	4	3	2	1	0
RESERVED		boost_vout					max_current
R/W-0h		R/W-0h					R/W-0h

Table 2-5 Dev_Config_0 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	RESERVED	R/W	0h	Reserved
5-1	boost_vout	R/W	0h	Boost output voltage with 0.1 V step from 3 V to 5.5 V 0h = 3 V 1h = 3.1 V 2h = 3.2 V 3h = 3.3 V 4h = 3.4 V ... 18h = 5.4 V 19h = 5.5 V 2Ah = 5.5 V (max VOUT, values above 2Ah have the same effect) ... 1Fh = 5.5V
0	max_current	R/W	0h	Max output current setting 0h = 25.5mA 1h = 51mA

2.3.2 Dev_Config_1 Register (Address = 2h) [Reset = 00h]

Dev_Config_1 is shown in Figure 2-3 and described in Table 2-6.

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Figure 2-3 Dev_Config_1 Register

7	6	5	4	3	2	1	0
pwm_fre	led_mode			mix_sel_led
R/W-0h	R/W-0h			R/W-0h

Table 2-6 Dev_Config_1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	pwm_fre	R/W	0h	PWM dimming frequency setting 0h = 24kHz 1h = 12kHz
6-4	led_mode	R/W	0h	LED mode configuration 0h = Direct drive mode 1h = Scan drive mode with 1 scan 2h = Scan drive mode with 2 scans 3h = Scan drive mode with 3 scans 4h = Scan drive mode with 4 scans 5h = Mix drive mode with 1 scan 6h = Mix drive mode with 2 scans 7h = Mix drive mode with 3 scans
3-0	mix_sel_led	R/W	0h	Outputs in direct drive mode (Only effective when configured to mix drive mode) mix_sel_led[0] = 1h, OUT0 is selected as direct drive output mix_sel_led[1] = 1h, OUT1 is selected as direct drive output mix_sel_led[2] = 1h, OUT2 is selected as direct drive output mix_sel_led[3] = 1h, OUT3 is selected as direct drive output

2.3.3 Dev_Config_2 Register (Address = 3h) [Reset = E4h]

Dev_Config_2 is shown in Figure 2-4 and described in Table 2-7.

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Figure 2-4 Dev_Config_2 Register

7	6	5	4	3	2	1	0
scan_order_3		scan_order_2		scan_order_1		scan_order_0
R/W-3h		R/W-2h		R/W-1h		R/W-0h

Table 2-7 Dev_Config_2 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	scan_order_3	R/W	3h	The 4th scan line FET number in matrix mode when total scan line number is greater than 3 lines 0h = OUT0 1h = OUT1 2h = OUT2 3h = OUT3
5-4	scan_order_2	R/W	2h	The 3rd scan line FET number in matrix mode when total scan line number is greater than 2 lines 0h = OUT0 1h = OUT1 2h = OUT2 3h = OUT3
3-2	scan_order_1	R/W	1h	The 2nd scan line FET number in matrix mode when total scan line number is greater than 1 line 0h = OUT0 1h = OUT1 2h = OUT2 3h = OUT3
1-0	scan_order_0	R/W	0h	The 1st scan line FET number in matrix mode 0h = OUT0 1h = OUT1 2h = OUT2 3h = OUT3

2.3.4 Dev_Config_3 Register (Address = 4h) [Reset = 00h]

Dev_Config_3 is shown in Figure 2-5 and described in Table 2-8.

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Figure 2-5 Dev_Config_3 Register

7	6	5	4	3	2	1	0
auto_en_b0	auto_en_a2	auto_en_a1	auto_en_a0	auto_en_3	auto_en_2	auto_en_1	auto_en_0
R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h

Table 2-8 Dev_Config_3 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	auto_en_b0	R/W	0h	LED_B0 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
6	auto_en_a2	R/W	0h	LED_A2 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
5	auto_en_a1	R/W	0h	LED_A1 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
4	auto_en_a0	R/W	0h	LED_A0 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
3	auto_en_3	R/W	0h	LED_3 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
2	auto_en_2	R/W	0h	LED_2 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
1	auto_en_1	R/W	0h	LED_1 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
0	auto_en_0	R/W	0h	LED_0 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode

2.3.5 Dev_Config_4 Register (Address = 5h) [Reset = 00h]

Dev_Config_4 is shown in Figure 2-6 and described in Table 2-9.

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Figure 2-6 Dev_Config_4 Register

7	6	5	4	3	2	1	0
auto_en_d2	auto_en_d1	auto_en_d0	auto_en_c2	auto_en_c1	auto_en_c0	auto_en_b2	auto_en_b1
R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h

Table 2-9 Dev_Config_4 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	auto_en_d2	R/W	0h	LED_D2 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
6	auto_en_d1	R/W	0h	LED_D1 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
5	auto_en_d0	R/W	0h	LED_D0 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
4	auto_en_c2	R/W	0h	LED_C2 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
3	auto_en_c1	R/W	0h	LED_C1 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
2	auto_en_c0	R/W	0h	LED_C0 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
1	auto_en_b2	R/W	0h	LED_B2 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode
0	auto_en_b1	R/W	0h	LED_B1 autonomous control enable 0h = Disabled, LED in manual mode 1h = Enabled, LED in autonomous mode

2.3.6 Dev_Config_5 Register (Address = 6h) [Reset = 00h]

Dev_Config_5 is shown in Figure 2-7 and described in Table 2-10.

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Figure 2-7 Dev_Config_5 Register

7	6	5	4	3	2	1	0
exp_en_b0	exp_en_a2	exp_en_a1	exp_en_a0	exp_en_3	exp_en_2	exp_en_1	exp_en_0
R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h

Table 2-10 Dev_Config_5 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	exp_en_b0	R/W	0h	LED_B0 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
6	exp_en_a2	R/W	0h	LED_A2 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
5	exp_en_a1	R/W	0h	LED_A1 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
4	exp_en_a0	R/W	0h	LED_A0 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
3	exp_en_3	R/W	0h	LED_3 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
2	exp_en_2	R/W	0h	LED_2 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
1	exp_en_1	R/W	0h	LED_1 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
0	exp_en_0	R/W	0h	LED_0 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve

2.3.7 Dev_Config_6 Register (Address = 7h) [Reset = 00h]

Dev_Config_6 is shown in Figure 2-8 and described in Table 2-11.

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Figure 2-8 Dev_Config_6 Register

7	6	5	4	3	2	1	0
exp_en_d2	exp_en_d1	exp_en_d0	exp_en_c2	exp_en_c1	exp_en_c0	exp_en_b2	exp_en_b1
R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h	R/W-0h

Table 2-11 Dev_Config_6 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	exp_en_d2	R/W	0h	LED_D2 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
6	exp_en_d1	R/W	0h	LED_D1 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
5	exp_en_d0	R/W	0h	LED_D0 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
4	exp_en_c2	R/W	0h	LED_C2 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
3	exp_en_c1	R/W	0h	LED_C1 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
2	exp_en_c0	R/W	0h	LED_C0 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
1	exp_en_b2	R/W	0h	LED_B2 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve
0	exp_en_b1	R/W	0h	LED_B1 exponential dimming enable 0h = Disabled, LED PWM dimming with linear curve 1h = Enabled, LED PWM dimming with exponential curve

2.3.8 Dev_Config_7 Register (Address = 8h) [Reset = 00h]

Dev_Config_7 is shown in Figure 2-9 and described in Table 2-12.

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Figure 2-9 Dev_Config_7 Register

7	6	5	4	3	2	1	0
phase_align_3		phase_align_2		phase_align_1		phase_align_0
R/W-0h		R/W-0h		R/W-0h		R/W-0h

Table 2-12 Dev_Config_7 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	phase_align_3	R/W	0h	LED_3 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
5-4	phase_align_2	R/W	0h	LED_2 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
3-2	phase_align_1	R/W	0h	LED_1 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
1-0	phase_align_0	R/W	0h	LED_0 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align

2.3.9 Dev_Config_8 Register (Address = 9h) [Reset = 00h]

Dev_Config_8 is shown in Figure 2-10 and described in Table 2-13.

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Figure 2-10 Dev_Config_8 Register

7	6	5	4	3	2	1	0
phase_align_b0		phase_align_a2		phase_align_a1		phase_align_a0
R/W-0h		R/W-0h		R/W-0h		R/W-0h

Table 2-13 Dev_Config_8 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	phase_align_b0	R/W	0h	LED_B0 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
5-4	phase_align_a2	R/W	0h	LED_A2 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
3-2	phase_align_a1	R/W	0h	LED_A1 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
1-0	phase_align_a0	R/W	0h	LED_A0 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align

2.3.10 Dev_Config_9 Register (Address = Ah) [Reset = 00h]

Dev_Config_9 is shown in Figure 2-11 and described in Table 2-14.

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Figure 2-11 Dev_Config_9 Register

7	6	5	4	3	2	1	0
phase_align_c1		phase_align_c0		phase_align_b2		phase_align_b1
R/W-0h		R/W-0h		R/W-0h		R/W-0h

Table 2-14 Dev_Config_9 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	phase_align_c1	R/W	0h	LED_C1 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
5-4	phase_align_c0	R/W	0h	LED_C0 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
3-2	phase_align_b2	R/W	0h	LED_B2 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
1-0	phase_align_b1	R/W	0h	LED_B1 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align

2.3.11 Dev_Config_10 Register (Address = Bh) [Reset = 00h]

Dev_Config_10 is shown in Figure 2-12 and described in Table 2-15.

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Figure 2-12 Dev_Config_10 Register

7	6	5	4	3	2	1	0
phase_align_d2		phase_align_d1		phase_align_d0		phase_align_c2
R/W-0h		R/W-0h		R/W-0h		R/W-0h

Table 2-15 Dev_Config_10 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	phase_align_d2	R/W	0h	LED_D2 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
5-4	phase_align_d1	R/W	0h	LED_D1 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
3-2	phase_align_d0	R/W	0h	LED_D0 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align
1-0	phase_align_c2	R/W	0h	LED_C2 PWM phase align method 0h = Forward align 1h = Forward align 2h = Middle align 3h = Backward align

2.3.12 Dev_Config_11 Register (Address = Ch) [Reset = 00h]

Dev_Config_11 is shown in Figure 2-13 and described in Table 2-16.

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Figure 2-13 Dev_Config_11 Register

7	6	5	4	3	2	1	0
RESERVED					vsync_out_en	blank_time
R/W-0h					R/W-0h	R/W-0h

Table 2-16 Dev_Config_11 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-3	RESERVED	R/W	0h	Reserved
2	vsync_out_en	R/W	0h	Vsync used as output to export internal oscilator clock 0h = Vsync is input 1h = Vsync is output
1-0	blank_time	R/W	0h	Line change time 0h = 1us 1h = 1.3us 2h = 1.7us 3h = 2us

2.3.13 Dev_Config_12 Register (Address = Dh) [Reset = 08h]

Dev_Config_12 is shown in Figure 2-14 and described in Table 2-17.

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Figure 2-14 Dev_Config_12 Register

7	6	5	4	3	2	1	0
vmid_sel		clamp_sel	clamp_dis	lod_action	lsd_action	lsd_threshold
R/W-0h		R/W-0h	R/W-0h	R/W-1h	R/W-0h	R/W-0h

Table 2-17 Dev_Config_12 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	vmid_sel	R/W	0h	Clamp voltage selection 0h = VOUT-1.1V 1h = VOUT-1.3V 2h = VOUT-1.5V 3h = VOUT-1.7V
5	clamp_sel	R/W	0h	Clamp behavior selection 0h = Clamp the OUTs only during line change time 1h = Clamp the OUTs once current sink turns off
4	clamp_dis	R/W	0h	Clamp behavior disable 0h = Enale clamp 1h = Disable clamp
3	lod_action	R/W	1h	Action when LED open fault happens 0h = No action 1h = Shutdown current sink
2	lsd_action	R/W	0h	Action when LED short fault happens 0h = No action 1h = All OUTs shut down
1-0	lsd_threshold	R/W	0h	LSD threshold 0h = 0.35 * VCC 1h = 0.45 * VCC 2h = 0.55 * VCC 3h = 0.65 * VCC