SNVU864
October 2023
TPS3762-Q1
1
Description
Features
4
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.4
Device Information
2
Hardware
2.1
EVM Connectors
2.1.1
EVM Jumpers
2.1.2
EVM Test Points
2.2
EVM Setup and Operation
2.2.1
Input Supply Voltage (VDD)
2.2.2
SENSE
2.2.3
RESET
2.2.4
Built-In Self-Test (BIST)
2.2.5
Built-In Self-Test Enable and Latch Clear (BIST_EN / LATCH_CLR)
2.2.6
RESET Time Delay (CTR)
2.2.7
Sense Time Delay (CTS)
3
Implementation Results
3.1
EVM Performance Results
4
Hardware Design Files
4.1
Schematics
4.2
PCB Layout
4.3
Bill of Materials
5
Additional Information
Trademarks
1.3
Specification
MIN
MAX
UNIT
Voltage
V
DD
2.7
65
V
Voltage
V
SENSE
, V
RESET
0
65
V
Voltage
V
CTS
, V
CTR
0
5.5
V
Current
I
RESET
, I
BIST
0
±5
mA
Temperature
Operating junction temperature, T
J
–40
125
°C