SNVU874 December 2024
Connector | Pins | Description | Default Connection |
---|---|---|---|
JP1 | 1, 2 | UVLO/EN pin connected to VIN resistor divider | Y |
2, 3 | UVLO/EN pin connected to BIAS | ||
JP2 | 1, 2 | Phase 2 is turned on | Y |
2, 3 | Phase 2 is turned off | ||
JP3 | 1, 2 | Set to FPWM | |
2, 3 | Set to DEM | Y | |
JP4 | 1, 2 | BIAS pin connected to VIN | Y |
JP5 | 1, 2 | RC filter from J8 connected to ATRK/DTRK pin. | Y |
JP6 | 1, 2 | Injection signal input for bode plot measurement | Y |
J7 | 1, 2 | DLY pin | |
J8 | 1,2 | Input to ATRK/DTRK pin. RC filter is inserted. | |
J9 | 1 | SYNCIN to the secondary EVM | |
3 | No Connection | ||
5 | UVLO/EN to the secondary EVM | ||
7 | EN2 to the secondary EVM | ||
9 | PGOOD to the secondary EVM | ||
11 | ATRK/DTRK to the secondary EVM | ||
13 | SS to the secondary EVM | ||
15 | COMP to the secondary EVM | ||
17 | MODE to the secondary EVM | ||
19 | ILIM/IMON to the secondary EVM | ||
21 | SCL to the secondary EVM | ||
23 | SDA to the secondary EVM | ||
2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 | GND | ||
J10 | 1 | SYNCOUT from the primary EVM | |
3 | No Connection | ||
5 | UVLO/EN from the primary EVM | ||
7 | EN2 from the primary EVM | ||
9 | PGOOD from the primary EVM | ||
11 | ATRK/DTRK from the primary EVM | ||
13 | SS from the primary EVM | ||
15 | COMP from the primary EVM | ||
17 | MODE from the primary EVM | ||
19 | ILIM/IMON from the primary EVM | ||
21 | SCL to the primary EVM | ||
23 | SDA to the primary EVM | ||
2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 | GND | ||
J13 | 10-pin header | Connector for I2C operation |