SNVU880 March   2024 LMR43606-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 Test Points
      2. 2.1.2 Jumpers
  9. 3Test Results
    1. 3.1 LMR43606MQ3EVM-2M Test Results
      1. 3.1.1 Efficiency, Load Regulation, and Thermal Picture
      2. 3.1.2 Load Transients
      3. 3.1.3 Output Ripple
      4. 3.1.4 Conducted EMI
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks

2.1.2 Jumpers

See Figure 3-2 for jumper locations.

  • JEN — This jumper allows the ENABLE input to be connected to GND in order to disable the IC. By default, this jumper is left open since there is a pullup resistor, R2 (RENT), to VIN to enable the IC.
  • JPGOOD — Use this jumper to select how the PGOOD pin is connected. A jumper can be used to connect pin 2 and 3. In this configuration, the PGOOD pin is pulled up to VOUT through R7 (RPGOOD) with a value of 100kΩ. When connecting the jumper between pin 1 and 2, the PGOOD pin is pulled up to VCC through R7 (RPGOOD) with a value of 100kΩ. By default, this jumper is not populated.
  • JMODE/SYNC — Use this jumper to select the mode of operation in a MODE/SYNC trim part.
    Connecting a jumper between pin 1 and 2 sets the IC operation to PFM (pulse frequency modulation) mode for a higher efficiency at light load. A jumper between pin 2 and pin 3 causes the IC to operate in FPWM (forced pulse width modulation) mode. By default, the jumper is connected between pin 1 and 2. Pin 1 is indicated by the dot on the PCB.
GUID-20200903-CA0I-TKJN-BX8G-DPG60DVHJFTM-low.gifFigure 2-2 Jumper Locations