SNVU907A July   2024  – August 2024 LM5137-Q1 , LM5137F-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
      1. 1.3.1 Application Circuit Diagrams
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  9. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Efficiency
      2. 3.1.2 Operating Waveforms
        1. 3.1.2.1 Load Transient Response
        2. 3.1.2.2 Startup/Shutdown With VIN
        3. 3.1.2.3 Startup/Shutdown With ENABLE ON and OFF
        4. 3.1.2.4 Switching
      3. 3.1.3 Thermal Performance
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Layout Guidelines
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
    2. 6.2 Documentation Support
      1. 6.2.1 Related Documentation
        1. 6.2.1.1 PCB Layout Resources
        2. 6.2.1.2 Thermal Design Resources
  13. 7Revision History

Features

  • Maximum inout voltage of 36V
    • VIN UVLO thresholds set at 6.5V and 4.5V
  • Tightly regulated output voltages of 5V and 3.3V, each rated at 20A with 1mV load, line regulation
  • High efficiency – 96% at 10A, 94% at 20A
    • VCC bias power derived from the 5V output
  • Switching frequency of 440kHz synchronizable ±20% with an external clock signal
  • Input π-stage EMI filter meets CISPR 25
    • Spread spectrum (DRSS) option for lower EMI
    • Electrolytic capacitor for parallel damping
  • Peak current-mode control architecture provides fast line and load transient response
    • Integrated slope compensation
    • Forced PWM (FPWM) or pulsed frequency modulation (PFM) operation
  • Integrated power MOSFET gate drivers
    • 3A/2A sink/source gate drive current capability
    • Adaptive dead-time control reduces power dissipation and MOSFET temperature rise
  • Integrated protection features for robust design
    • Overcurrent protection (OCP) with shunt or inductor DCR current sensing
    • Monotonic prebias output voltage startup
    • User-adjustable soft-start time set to 4.5ms
    • PG and FAULT outputs for each channel
    • Dual current monitor outputs (IMON1, IMON2)
  • Fully assembled, tested and proven PCB layout with 3.3" × 2.9" (84mm × 74mm) total footprint