SNVU917 September   2024 LM706A0-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  8. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 EVM Characteristics
      2. 3.1.2 Conversion Efficiency
      3. 3.1.3 Operating Waveforms
        1. 3.1.3.1 Switching
        2. 3.1.3.2 Load Transient Response
        3. 3.1.3.3 Short-Circuit Recovery
        4. 3.1.3.4 Start-Up and Shutdown With EN
        5. 3.1.3.5 Start-Up With VIN
      4. 3.1.4 Bode Plot
      5. 3.1.5 CISPR 25 EMI Performance
      6. 3.1.6 Thermal Performance
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Multi-Layer Stackup
    3. 4.3 Bill of Materials
  10. 5Compliance Information
    1. 5.1 Compliance and Certifications
  11. 6Related Documentation
    1. 6.1 Supplemental Content
      1. 6.1.1 Development Support
      2. 6.1.2 PCB Layout Resources
      3. 6.1.3 Thermal Design Resources
  12. 7Additional Information
    1. 7.1 Trademarks

Features

  • Wide input voltage operating range of 8V to 65V

  • 1% accurate fixed 3.3V, 5V, or adjustable output down to 0.8V

  • Switching frequency of 400kHz externally synchronizable up or down by 20%
  • Full-load efficiency of 89.3% at 12VIN, 88.1% at 24VIN and 85.4% at 48VIN
  • 260µA operating current at 48VIN
  • Designed for low Electromagnetic Interference (EMI)
    • Dual-random spread spectrum EMI mitigation
    • Meets CISPR 25 Class 5 and UNECE Reg 10 EMI standards
  • Peak current-mode control architecture provides fast line and load transient response
    • Integrated slope compensation adaptive with switching frequency
    • Forced pulsed width modulation (FPWM) or pulsed frequency modulation (PFM) operation
    • Optional internal or external loop compensation
  • Integrated high-side and low-side power MOSFETs
  • Overcurrent protection (OCP) with hiccup mode for sustained overload conditions
  • SYNCOUT signal 180° out-of-phase with internal clock
  • Power-Good signal with 100kΩ pullup resistor to VCC
  • Internal 3ms soft start
  • Fully assembled, tested, and proven PCB layout