SPMA083 January 2022 TM4C129CNCPDT , TM4C129CNCPDT , TM4C129CNCZAD , TM4C129CNCZAD , TM4C129DNCPDT , TM4C129DNCPDT , TM4C129DNCZAD , TM4C129DNCZAD , TM4C129EKCPDT , TM4C129EKCPDT , TM4C129ENCPDT , TM4C129ENCPDT , TM4C129ENCZAD , TM4C129ENCZAD , TM4C129LNCZAD , TM4C129LNCZAD , TM4C129XKCZAD , TM4C129XKCZAD , TM4C129XNCZAD , TM4C129XNCZAD
The implementation of effective safeguards for systems continues to grow as a priority for system designers. This application report and the associated collateral are aimed at providing sensible options that can be considered for TM4C microcontrollers. Techniques such as leveraging EEPROM for key storage, validating firmware images with hash signatures, and locking JTAG access are all methods that can increase the protection of a system against unsophisticated or accidental attempts to override a code image. These concepts are applicable across all boot loader options as long as an emphasis is placed on ensuring images are able to be transferred in a manner that validates all packets were received correctly. While the focus for this application report was centered on devices with the hardware AES encryption peripheral, the same concepts can be applied for all TM4C devices provided software AES is leveraged instead with the tradeoffs being additional cost of code space and slower execution of the boot loading process. Ultimately, it is up to the system designers to define the criteria for what safeguards are required for proper system protection and assess the correct implementation to meet those requirements.