SPRAB89A September 2011 – March 2014
On the C6000, there are five delay slots between the fetch of a branch instruction—including a call or return—and the cycle in which it executes. Instructions may be scheduled in the delay slots subject to the following: a caller is responsible for ensuring that the effects of all instructions that could affect the callee are complete before the E1 phase of the callee's first instruction. Similarly, for a return instruction, the callee is responsible for ensuring that all instructions that could affect the caller are complete before the E1 phase of the instruction at the return address.