SPRAC21A June 2016 – June 2019 OMAP-L132 , OMAP-L138 , TDA2E , TDA2EG-17 , TDA2HF , TDA2HG , TDA2HV , TDA2LF , TDA2P-ABZ , TDA2P-ACD , TDA2SA , TDA2SG , TDA2SX , TDA3LA , TDA3LX , TDA3MA , TDA3MD , TDA3MV
The Arm® Cortex-A15 (also referred to as CPU/MPU) is a 32-bit RISC microprocessor with NEON™ SIMD coprocessor and can be clocked up to 1.5 GHz. The Cortex-A15 (ARMv7 architecture based) has an MMU, 32KB of level1 instruction and data cache, and up to 4MB configurable level2 cache. For more details on the Cortex-A15, see the Cortex®-A15 Technical Reference Manual: r2p0.