SPRACC0A November   2017  – November 2020 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1

 

  1.   Trademarks
  2. Introduction and Scope
  3. SRAM Bit Array
  4. Sources of SRAM Failures
    1. 3.1 Manufacturing Defects
      1. 3.1.1 Time Zero Fails
      2. 3.1.2 Latent Fails
    2. 3.2 Circuit Drift With Usage
    3. 3.3 Circuit Overstress
    4. 3.4 Soft Errors
      1. 3.4.1 Radioactive Events
      2. 3.4.2 Dynamic Voltage Events
      3. 3.4.3 Summary of Error Sources
  5. Methods for Managing Memory Failures in Electronic Systems
    1. 4.1 Start-Up Testing
    2. 4.2 In-System Testing
    3. 4.3 Parity Detection
    4. 4.4 Error Detection and Correction (EDAC)
    5. 4.5 Redundancy
  6. Comparisons and Conclusions
  7. C2000 Memory Types Example
    1. 6.1 TMS320F2837xD
  8. Memory Types
    1. 7.1 Dedicated RAM (Mx and Dx RAM)
    2. 7.2 Local Shared RAM (LSx RAM)
    3. 7.3 Global Shared RAM (GSx RAM)
    4. 7.4 CPU Message RAM (CPU MSGRAM)
    5. 7.5 CLA Message RAM (CLA MSGRAM)
  9. Summary
  10. References
  11. 10Revision History

Radioactive Events

Radioactive events come from radioactive particles penetrating the semiconductor material and upsetting the voltage in the bit cell latch. These events are rare under normal circumstances, but can be higher in a radioactive medical environment and/or very high altitudes where there is less of an atmosphere to reduce the particle counts.

Depending upon the angle of the penetration and the intensity of the particle, one or more bit values can be flipped. This will happen in a straight line. If the straight line goes across rows then the multiple failing bits are guaranteed to be in different words. This works for vertically oriented penetration or for diagonal.

If the penetration orientation is down the row, then it must go beyond the mux factor to create more than one bit in the same word.

The smaller the geometries, the more bits can be disturbed by a particle penetration. At a 90 nm process node a penetration of 5 cells is extremely rare. At 65 nm a penetration of 6 cells is extremely rare. Low leakage process nodes are less susceptible to these events than high performance process nodes.

Radioactive particle penetration can, and occasionally does, physically damage SRAM cells. This is more common in process nodes with more aggressive structural geometries.