SPRACI9A October   2018  – July 2021 AM6526 , AM6528 , AM6546 , AM6548

 

  1.   Trademarks
  2. 1Introduction
  3. 2Recommendations Specific to the AM65x/DRA80x
    1. 2.1  EVM versus Data Sheet
    2. 2.2  Power
    3. 2.3  Reset
    4. 2.4  Boot Modes
    5. 2.5  Unused Signals
    6. 2.6  Clocking
    7. 2.7  System Issues
    8. 2.8  Low Power Considerations
    9. 2.9  DDR
    10. 2.10 MMC
    11. 2.11 OSPI and QSPI
    12. 2.12 GPMC NAND
    13. 2.13 I2C
    14. 2.14 CPSW Ethernet
    15. 2.15 ICSSG
    16. 2.16 USB
    17. 2.17 SERDES - USB3
    18. 2.18 SERDES - PCIe
    19. 2.19 JTAG and EMU
  4. 3References
  5. 4Revision History

Clocking

  • Do you have a clock source for WKUP_OSC0? A clock source for WKUP_OSC0 is required for proper operation of the AM654x/DRA80x.
  • If OSC1 is not used, do you have it properly terminated? The AM654x/DRA80x can operate with a single clock present on WKUP_OSC0. OSC1 can be used to provide a different clock for the MAIN domain or for use to generate audio clock frequencies.
  • Is the frequency for WKUP_OSC0 one of the acceptable frequencies? The data manual includes a list of supported frequencies for WKUP_OSC0. The clock present must be one of the supported frequencies.
  • If used to clock the MAIN domain is OSC1 one of the acceptable frequencies? The data manual includes a list of supported frequencies for OSC1. The clock present must be one of the supported frequencies unless it is only used for audio clock generation.
  • Does your design require a low frequency clock input? The WKUP_LFOSC clock input is available to provide a 32.768-KHz clock for low power operation in deeper sleep modes. If your design does not support deeper sleep modes, this clock is not necessary.
  • It is preferable to always have bias and dampening resistors that can help tune the crystal later in early version of the design. For more details, see the Clock Specifications chapter in the device-specific data sheet.