SPRACJ6A October   2018  – December 2022 AM6526 , AM6528 , AM6546 , AM6548

 

  1.   Trademarks
  2. Introduction
    1. 1.1 Before Getting Started
    2. 1.2 Device (Processor) Selection
    3. 1.3 Technical Documentation
    4. 1.4 Design Documentation
  3. System Block Diagram
    1. 2.1 Creating the System Block Diagram
    2. 2.2 Selecting the Boot Mode
    3. 2.3 Confirming Pin Multiplexing Compatibility
  4. Power Supply
    1. 3.1 Power (Supply) Rails
      1. 3.1.1 Internal LDOs for IO groups
      2. 3.1.2 Dual-Voltage LVCMOS I/Os
      3. 3.1.3 Dual-Voltage Switching SDIO I/Os
    2. 3.2 Determining System Power Requirements
    3. 3.3 Power Supply Filters
    4. 3.4 Power Supply Decoupling and Bulk Capacitors
    5. 3.5 Power Supply Sequencing
  5. Clocking
    1. 4.1 System Clock Inputs
    2. 4.2 Single-Ended Clock Sources
    3. 4.3 Unused Clock Inputs
  6. JTAG
    1. 5.1 JTAG / Emulation
      1. 5.1.1 Configuration of JTAG / Emulation
      2. 5.1.2 System Implementation of JTAG / Emulation
      3. 5.1.3 JTAG Termination
  7. Device Configurations and Initialization
    1. 6.1 Device Reset
    2. 6.2 Boot Modes
    3. 6.3 Watchdog Timer
  8. Peripherals
    1. 7.1 Selecting Peripherals Across Functional Domains
    2. 7.2 Ethernet Interface
    3. 7.3 Programmable Real-Time Unit and Industrial Communication Subsystem - Gigabit (PRU-ICSSG)
    4. 7.4 Universal Serial Bus (USB) Subsystem
  9. I/O Buffers and Termination
  10. Power Consumption and Thermal Solutions
    1. 9.1 Power Consumption
    2. 9.2 Power Savings Modes
    3. 9.3 Guidance on Thermal Solution
  11. 10Schematic Recommendations
    1. 10.1 Selection of Component and Values
    2. 10.2 Schematics Development
    3. 10.3 Reviewing the Schematics
    4. 10.4 Floor planning of the PCB
  12. 11Layout and Routing Guidelines
    1. 11.1 Escape Routing Guidelines
    2. 11.2 DDR Board Design and Layout Guidelines
    3. 11.3 High-Speed Differential Signal Routing Guidance
  13. 12Terminology
  14. 13References
  15. 14Revision History

Selecting the Boot Mode

The System Block Diagram should indicate the interface used for booting.

The AM65x device contains multiple peripheral interfaces that support boot mode. Examples include: QSPI, OSPI, PCIe, GPMC NOR, Hyperflash, Ethernet, USB, eMMC, MMCSD, I2C, SPI and UART. The AM65x device supports a primary boot mode option and an optional backup boot mode option. If the primary boot source fails to boot, the ROM moves on to the backup mode.

The boot mode pins and the associated resistor configurations provide inputs on the boot mode setting to be used by the ROM code for boot. These pins are sampled at power-on-reset, and must be properly set up before releasing (deassertion) the reset. The BOOTMODE[06:00] pins are used to select the primary and backup interfaces used for booting. Additionally, each boot mode has different configuration options, controlled by the other boot mode pins (BOOTMODE[18:07] and MCU_BOOTMODE[09:00]).

Key considerations for boot mode configuration:

  • TI recommends including provision to configure boot modes used during development, such as UART boot or No-boot mode for JTAG debug.
  • Boot pins have other functions after reset. Ensure the board design takes this into account when choosing pullup/pulldown resistors for the boot pins. If these pins are driven by another device, they must return to the proper boot configuration levels whenever the device is reset (indicated by the PORz_OUT pin) to enable it to boot properly.
  • The functionality of some boot mode pins are reserved. These pins should not be left floating and must be terminated (pullup or pulldown). For details regarding termination of reserved boot mode pins, see the Boot Mode Pins section of the Initialization chapter of the device-specific TRM.

For details regarding boot modes, see the Initialization chapter of the device-specific TRM.

Note:

It is the user responsibility to set the boot mode pins (via pullups or pulldowns, and optionally jumpers/switches) depending on the desired boot scenario.