SPRACJ6A October   2018  – December 2022 AM6526 , AM6528 , AM6546 , AM6548

 

  1.   Trademarks
  2. Introduction
    1. 1.1 Before Getting Started
    2. 1.2 Device (Processor) Selection
    3. 1.3 Technical Documentation
    4. 1.4 Design Documentation
  3. System Block Diagram
    1. 2.1 Creating the System Block Diagram
    2. 2.2 Selecting the Boot Mode
    3. 2.3 Confirming Pin Multiplexing Compatibility
  4. Power Supply
    1. 3.1 Power (Supply) Rails
      1. 3.1.1 Internal LDOs for IO groups
      2. 3.1.2 Dual-Voltage LVCMOS I/Os
      3. 3.1.3 Dual-Voltage Switching SDIO I/Os
    2. 3.2 Determining System Power Requirements
    3. 3.3 Power Supply Filters
    4. 3.4 Power Supply Decoupling and Bulk Capacitors
    5. 3.5 Power Supply Sequencing
  5. Clocking
    1. 4.1 System Clock Inputs
    2. 4.2 Single-Ended Clock Sources
    3. 4.3 Unused Clock Inputs
  6. JTAG
    1. 5.1 JTAG / Emulation
      1. 5.1.1 Configuration of JTAG / Emulation
      2. 5.1.2 System Implementation of JTAG / Emulation
      3. 5.1.3 JTAG Termination
  7. Device Configurations and Initialization
    1. 6.1 Device Reset
    2. 6.2 Boot Modes
    3. 6.3 Watchdog Timer
  8. Peripherals
    1. 7.1 Selecting Peripherals Across Functional Domains
    2. 7.2 Ethernet Interface
    3. 7.3 Programmable Real-Time Unit and Industrial Communication Subsystem - Gigabit (PRU-ICSSG)
    4. 7.4 Universal Serial Bus (USB) Subsystem
  9. I/O Buffers and Termination
  10. Power Consumption and Thermal Solutions
    1. 9.1 Power Consumption
    2. 9.2 Power Savings Modes
    3. 9.3 Guidance on Thermal Solution
  11. 10Schematic Recommendations
    1. 10.1 Selection of Component and Values
    2. 10.2 Schematics Development
    3. 10.3 Reviewing the Schematics
    4. 10.4 Floor planning of the PCB
  12. 11Layout and Routing Guidelines
    1. 11.1 Escape Routing Guidelines
    2. 11.2 DDR Board Design and Layout Guidelines
    3. 11.3 High-Speed Differential Signal Routing Guidance
  13. 12Terminology
  14. 13References
  15. 14Revision History

Terminology

CPSW2G – Common Platform Ethernet Switch 2-port Gigabit

DRD – Dual-Role-Device

E2E – Engineer to Engineer

ECAP – Enhanced Capture

eMMC – embedded Multi-Media Card

EMU – Emulation Control

GPIO – General Purpose Input/Output

GPMC – General-Purpose Memory Controller

HS-RTDX – High Speed Real Time Data eXchange

I2C – Inter-Integrated Circuit Interface

IBIS – Input/Output Buffer Information Specification

IDK – Industrial Development Kit

IEP – Industrial Ethernet Peripheral

JTAG – Joint Test Action Group

LDO – Low Dropout

LVCMOS – Low voltage complementary metal oxide semiconductor

MII – Media Independent Interface

MMC – Multi-Media Card

OSPI – Octal Serial Peripheral Interface

PCB – Printed Circuit Board

PMIC – Power management integrated circuit

POR – Power-on Reset

PRU-ICSSG – Programmable Real-Time Unit and Industrial Communication Subsystem - Gigabit

POR – Power-on Reset

PWM – Pulse-Width Modulator

QSPI – Quad Serial Peripheral Interface

RGMII – Reduced Gigabit Media Independent Interface

RMII – Reduced Media Independent Interface

SD – Secure Digital

SDIO – Secure Digital Input Output

SGMII – Serial Gigabit Media Independent Interface

SPI – Serial Peripheral Interface

TCK – JTAG Test Clock Input

TDI – JTAG Test Data Input

TDO – JTAG Test Data Output

TMS – JTAG Test Mode Select Input

TRM – Technical Reference Manual

TRSTn – JTAG Reset

UART – Universal Asynchronous Receiver/Transmitter

USB – Universal Serial Bus