SPRACM8A June   2019  – January 2021 OMAP-L132 , OMAP-L132 , OMAP-L138 , OMAP-L138 , TMS320C6742 , TMS320C6742 , TMS320C6746 , TMS320C6746 , TMS320C6748 , TMS320C6748

 

  1.   Trademarks
  2. 1OMAP-L138 Boot Process
    1. 1.1 During Reset
    2. 1.2 After Reset
  3. 2Boot Utilities
    1. 2.1 AISgen
    2. 2.2 Serial Boot and Flash Loading Utility
      1. 2.2.1 Compiling
        1. 2.2.1.1 Under Windows
        2. 2.2.1.2 Under Linux
      2. 2.2.2 Running
        1. 2.2.2.1 Under Windows
        2. 2.2.2.2 Under Linux
      3. 2.2.3 Serial Flasher Options
    3. 2.3 Modifications for Custom Boards
    4. 2.4 Rebuilding and Customization of Boot Utilities
      1. 2.4.1 Download the Flash and Boot Utilities
      2. 2.4.2 Install and Configure the Required Software
        1. 2.4.2.1 Cygwin
        2. 2.4.2.2 Microsoft .NET Framework
      3. 2.4.3 Compiler Tools
        1. 2.4.3.1 Compiler Tools (CODESOURCERY G++ LITE)
        2. 2.4.3.2 C6X Compiler Tools
        3. 2.4.3.3 Newer CCS
      4. 2.4.4 Rebuilding the Serial Flash and Boot Utils Package for a Particular Platform
      5. 2.4.5 Rebuilding the HexAIS Utility for OMAPL13x
  4. 3Boot Examples
    1. 3.1 Booting Binaries
      1. 3.1.1 Description
      2. 3.1.2 Obtaining the Software
      3. 3.1.3 Running
    2. 3.2 Booting DSP Binaries on AM1808/OMAPL138
      1. 3.2.1 Description
      2. 3.2.2 Obtaining the Software
      3. 3.2.3 Running
        1. 3.2.3.1 OMAP-L138 EVM
        2. 3.2.3.2 C6748 EVM
  5. 4Debugging Bootloader
  6. 5OMAP-L138 Boot Benchmarks
    1. 5.1 Host Boot Performance
    2. 5.2 Test Details
      1. 5.2.1 Methodology
      2. 5.2.2 43
      3. 5.2.3 Software
      4. 5.2.4 Hardware
      5. 5.2.5 Discussion
  7. 6OMAP-L138 Bootloader FAQ
  8. 7References
  9.   A Setting c_int00 Using SYS/BIOS
  10.   Revision History

1.1 During Reset

There are two types of reset:

  • Power-On Reset (POR) - POR occurs when both RESET and TRST are low. Internal memory is cleared during this state. The boot pins will be latched when RESET goes high.
  • Warm Reset - Warm Reset occurs when RESET is low and TRST is high. Internal memory is retained during this state. The boot pins will be not be latched when RESET goes high, but instead retain the same values from the last POR.

It is important for the device to experience a POR when initially powered up. This will clear the emulation and PLL logic, as well as latch the boot pins correctly. Therefore, make sure TRST is externally pulled down on your board. Not doing so can be the cause of many boot related problems.

When the device is held in reset, all device I/Os are internally pulled down.

For the boot and configuration pins, if they are both routed out and 3-stated (not driven), it is strongly recommended that an external pullup/pulldown resistor be implemented. Although, internal pullup/pulldown resistors exist on these pins and they may match the desired configuration value, providing external connectivity can help ensure that valid logic levels are latched on these device boot and configuration pins. In addition, applying external pullup/pulldown resistors on the boot and configuration pins adds convenience to the user in debugging and flexibility in switching operating modes.

For details on how to choose values to oppose the internal pullup/pulldown resistors, see the Pullup/Pulldown Resistors section of the OMAP-L138 C6000™ DSP+ ARM® Processor Data Manual.