SPRACN1 May   2019 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   C2000 Software Controlled Firmware Update Process
    1.     Trademarks
    2. 1 Introduction
    3. 2 Configuring Custom Boot Mode
      1. 2.1 Custom Boot Pin Selection
      2. 2.2 Custom Boot Mode Definition
      3. 2.3 Writing the Values to User OTP
    4. 3 Hardware Modifications
    5. 4 Software Modifications
      1. 4.1 Application Software Modifications
      2. 4.2 Flash Kernel Modifications
      3. 4.3 Firmware Update Process
    6. 5 Flowchart
    7. 6 Summary
    8. 7 References

Flash Kernel Modifications

The following modifications have to be made in the flash kernel software (SCI/USB). In this example, the SCI kernel is used as a reference. To begin with, the GPIO15 pin has to be driven high. Once the firmware update is complete, the GPIO15 pin has to be driven low and then, after 50 µs, the device reset has to be triggered.

The updated code has to be rebuilt and the hex files generated by following the steps mentioned in readme.txt at <c2000Ware Installation Dir>\utilities\flash_programmers\serial_flash_programmer\.

  • Drive the GPIO15 pin high to ensure the boot comes back to the firmware update mode (SCI boot) if any interruption occurs during the firmware update process.
  • uint32_t main(void) { // // flush SCIA TX port by waiting while it is busy, driverlib. // sciaFlush(); // // initialize device and GPIO, driverlib. // Device_init(); Device_initGPIO(); // // init interrupt and vectorTable, drivelib. // Interrupt_initModule(); Interrupt_initVectorTable(); //// Drive GPIO pin to high//GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);GPIO_writePin(15, 1);DEVICE_DELAY_US(50); // // Enable Global Interrupt (INTM) and realtime interrupt (DBGM) // EINT; ERTM; // // initialize flash_sectors, fapi + driverlib // initFlashSectors(); uint32_t EntryAddr; // // parameter SCI_BOOT for GPIO28 (RX),29 (TX) is default. // EntryAddr = sciGetFunction(SCI_BOOT); return(EntryAddr); }
  • Once the firmware is updated, drive the GPIO15 pin low for 50 µs so as to drain the capacitor. This ensures that when reset occurs, the flash boot mode will be detected.
  • uint32_t sciGetFunction(uint32_t BootMode) { volatile uint32_t EntryAddr; uint16_t command; uint16_t data[10]; // 16*10 = 128 + 32 uint16_t length; < Removed rest of code to keep it short > while(command != RESET_CPU1) { < Removed rest of code to keep it short > GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD); GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT); GPIO_writePin(15, 0); DEVICE_DELAY_US(50); // // Get next Packet // //command = sciGetPacket(&length, data); //get next packet command = RESET_CPU1; } // // Reset with WatchDog Timeout // EALLOW; SysCtl_setWatchdogMode(SYSCTL_WD_MODE_RESET); SysCtl_enableWatchdog(); EDIS; while(1){} }